Cypress CY7C68301C, CY7C68321C, CY7C68320C Applications, CY7C68300A Compatibility, Introduction

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Applications

CY7C68300C/CY7C68301C

CY7C68320C/CY7C68321C

Applications

The CY7C68300C/301C and CY7C68320C/321A implement a USB 2.0 bridge for all ATA/ATAPI-6 compliant mass storage devices, such as the following:

•Hard drives

•CD-ROM, CD-R/W

•DVD-ROM, DVD-RAM, DVD±R/W

data transfer rates by minimizing losses due to device seek times. The ATA interface supports ATA PIO modes 0, 3, and 4, multiword DMA mode 2, and Ultra DMA modes 2, 3, and 4.

The device initialization process is configurable, enabling the AT2LP to initialize ATA/ATAPI devices without software inter- vention.

CY7C68300A Compatibility

•MP3 players

•Personal media players

•CompactFlash

•Microdrives

•Tape drives

•Personal video recorders

The CY7C68300C/301C and CY7C68320C/321A support one or two devices in the following configurations:

•ATA/ATAPI master only

•ATA/ATAPI slave only

•ATA/ATAPI master and ATA/ATAPI slave

•CompactFlash only

•ATA/ATAPI slave and CompactFlash or other removable IDE master

Additional Resources

•CY4615C EZ-USB AT2LP Reference Design Kit

•USB Specification version 2.0

As mentioned above, the CY7C68300C/301C contains a backward compatibility mode that allows it to be used in existing EZ-USB AT2 (CY7C68300A) designs. The backward compatibility mode is enabled by programming the EEPROM with the CY7C68300A signature.

During startup, the AT2LP checks the I2C™ bus for an EEPROM with a valid signature in the first two bytes. If the signature is 0x4D4D, the AT2LP configures itself for pin-to-pin compatibility with the AT2 and begins normal mass storage operation. If the signature is 0x534B, the AT2LP configures itself with the AT2LP pinout and begins normal mass storage operation.

Refer to the logic flow in Figure 1 for more information on the pinout selection process.

Most designs that use the AT2 can migrate to the AT2LP with no changes to either the board layout or EEPROM data. Cypress has published an application note focused on migrating from the AT2 to the AT2LP to help expedite the process. It can be downloaded from the Cypress website (http://www.cypress.com) or obtained through a Cypress representative.

•ATA Specification T13/1410D Rev 3B

•USB Mass Storage Class Bulk Only Transport Specification, www.usb.org

Introduction

The EZ-USB AT2LP™ (CY7C68300C/CY7C68301C and CY7C68320C/CY7C68321C) implements a fixed-function bridge between one USB port and one or two ATA- or ATAPI-based mass storage device ports. This bridge adheres to the Mass Storage Class Bulk-Only Transport Specification (BOT) and is intended for bus- and self-powered devices.

The AT2LP is the latest addition to the Cypress USB mass storage portfolio, and is an ideal cost- and power-reduction path for designs that previously used Cypress’s ISD-300A1, ISD-300LP, or EZ-USB AT2.

Figure 1. Simplified Pinout Selection Flowchart

Read EEPROM

EEPROM

Signature No 0x4D4D?

Yes

Specifically, the CY7C68300C/CY7C68301C includes a mode that makes it pin-for-pin compatible with the EZ-USB AT2 (CY7C68300A).

The USB port of the CY7C68300C/301C and CY7C68320C/321A (AT2LP) are connected to a host computer directly or with the downstream port of a USB hub. Software on the USB host system issues commands and sends data to the AT2LP and receives status and data from the AT2LP using standard USB protocol.

The ATA/ATAPI port of the AT2LP is connected to one or two mass storage devices. A 4 KB buffer maximizes ATA/ATAPI

Set

 

Set

EZ-USB AT2

 

EZ-USB AT2LP

(CY7C68300A)

 

(CY7C68300B)

Pinout

 

Pinout

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Normal Operation

Document 001-05809 Rev. *A

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Contents CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C FeaturesBlock Diagram EZ-USB AT2LP USB 2.0 to ATA/ATAPI BridgeIntroduction ApplicationsCY7C68300A Compatibility CY4615C EZ-USB AT2LP Reference Design Kit USB Specification versionCY7C68301C EZ-USB AT2LPCY7C68300C 56-pin SSOPRESET# EZ-USB AT2LP CY7C68300C CY7C68301C 56-pin QFNENABLE DD13CY7C68321C EZ-USB AT2LPCY7C68320C 56-pin SSOPGPIO2 EZ-USB AT2LP CY7C68320C CY7C68321C 56-pin QFNARESET# DD15CY7C68321A 100-pin TQFPCY7C68320A page USB D+ signal See “DPLUS, DMINUS” on pageUSB D-signal See “DPLUS, DMINUS” on page PU 10KCY7C68300C/CY7C68301C CY7C68320C/CY7C68321CChip reset See “RESET#” on page VBUS detection See “VBUSATAENABLE” onSCL, SDA “ATAPUEN” on pageDPLUS, DMINUS XTALIN, XTALOUTSYSIRQ USB High-SpeedDRVPWRVLD GPIO PinsATA Interface Pins LOWPWR#ATAPUEN VBUSATAENABLERESET# PWR500#ATA Command Block ATACB HID Functions for Button ControlsFunctional Overview Field Name Table 6. ATACB Field DescriptionsByte Field Description5-12 Figure 10. Operational Mode Selection Flow Operating ModesOperational Mode Selection Flow Fused Memory Data Bulk-Only Transport Specification . There is a vendor-specificTable 7. Command Block Wrapper Normal Mass Storage ModeMfgCB EEPROM Organization Figure 11. Snapshot of ‘AT2LP Blaster’ Utility“Functional Overview” on page 15 for more detail on how Enable a delay of up to 120 ms at each read of the DRQ bitwhere the device data length does not match the host data length. This allows the CY7C68300C/CY7C68301C to workDetermines if the AT2LP is to do an SRST reset during drive returned on bits 2, 1, and 0 of EP1IN. This bit must be set to CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration does not exist. The USB Mass Storage Class Bulk-OnlyUSB Bulk In Endpoint Interface DescriptorUSB Bulk Out Endpoint Terminator Number of the channel, must be a zero based value that is Page 29 ofDescriptor-Index 0 LANGID CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Descriptor-Serial Number unique serialLOADCONFIGDATA Label Table 12.EEPROM-related Vendor-specific CommandsREADCONFIGDATA bmRequestTypeOperating Conditions DC CharacteristicsAbsolute Maximum Ratings ATA Timing Characteristics AC Electrical CharacteristicsOrdering Information USB Transceiver CharacteristicsPackage Diagrams Figure 12. 100-Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A101Package Diagrams continued Figure 13. 56-lead Shrunk Small Outline PackagePage 39 of General PCB Layout Recommendations For USB Mass Storage DesignsFigure 14. 56-Lead QFN 8 x 8 mm LF56A PCB Material Quad Flat Package No Leads QFN Package Design NotesOther Design Considerations Devices With Small Buffers Disclaimers, Trademarks, and CopyrightsIDE Removable Media Devices Document Number Document History PagedIssue Date ECN NO
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