Cypress Package Diagrams continued, CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C, + Feedback

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CY7C68300C/CY7C68301C

CY7C68320C/CY7C68321C

Package Diagrams (continued)

Figure 13. 56-lead Shrunk Small Outline Package 056

0.088

0.092

0.025

BSC

	.020
	1
	0.395
	0.420
	0.292		DIMENSIONS IN INCHES MIN.
	0.299		DIMENSIONS IN INCHES MIN.
				MAX.
	56
0.720
0.730
	SEATING PLANE
	0.095			0.005
	0.095	.010		0.010
	0.110
	GAUGE PLANE
	0.110		0.024
			0.040
0.008	0.008		0° -8°	51-85062-*C
	0.016			51-85062-*C

0.0135

Document 001-05809 Rev. *A

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Image 38

Contents CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C FeaturesBlock Diagram EZ-USB AT2LP USB 2.0 to ATA/ATAPI BridgeIntroduction ApplicationsCY7C68300A Compatibility CY4615C EZ-USB AT2LP Reference Design Kit USB Specification versionCY7C68301C EZ-USB AT2LPCY7C68300C 56-pin SSOPRESET# EZ-USB AT2LP CY7C68300C CY7C68301C 56-pin QFNENABLE DD13CY7C68321C EZ-USB AT2LPCY7C68320C 56-pin SSOPGPIO2 EZ-USB AT2LP CY7C68320C CY7C68321C 56-pin QFNARESET# DD15CY7C68321A 100-pin TQFPCY7C68320A page USB D+ signal See “DPLUS, DMINUS” on pageUSB D-signal See “DPLUS, DMINUS” on page PU 10KCY7C68300C/CY7C68301C CY7C68320C/CY7C68321CChip reset See “RESET#” on page VBUS detection See “VBUSATAENABLE” onSCL, SDA “ATAPUEN” on pageDPLUS, DMINUS XTALIN, XTALOUTSYSIRQ USB High-SpeedDRVPWRVLD GPIO PinsATA Interface Pins LOWPWR#ATAPUEN VBUSATAENABLERESET# PWR500#ATA Command Block ATACB HID Functions for Button ControlsFunctional Overview Field Name Table 6. ATACB Field DescriptionsByte Field Description5-12 Figure 10. Operational Mode Selection Flow Operating ModesOperational Mode Selection Flow Fused Memory Data Bulk-Only Transport Specification . There is a vendor-specificTable 7. Command Block Wrapper Normal Mass Storage ModeMfgCB EEPROM Organization Figure 11. Snapshot of ‘AT2LP Blaster’ Utility“Functional Overview” on page 15 for more detail on how Enable a delay of up to 120 ms at each read of the DRQ bitwhere the device data length does not match the host data length. This allows the CY7C68300C/CY7C68301C to workDetermines if the AT2LP is to do an SRST reset during drive returned on bits 2, 1, and 0 of EP1IN. This bit must be set to CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration does not exist. The USB Mass Storage Class Bulk-OnlyUSB Bulk In Endpoint Interface DescriptorUSB Bulk Out Endpoint Terminator Number of the channel, must be a zero based value that is Page 29 ofDescriptor-Index 0 LANGID CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Descriptor-Serial Number unique serialLOADCONFIGDATA Label Table 12.EEPROM-related Vendor-specific CommandsREADCONFIGDATA bmRequestTypeOperating Conditions DC CharacteristicsAbsolute Maximum Ratings ATA Timing Characteristics AC Electrical CharacteristicsOrdering Information USB Transceiver CharacteristicsPackage Diagrams Figure 12. 100-Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A101Package Diagrams continued Figure 13. 56-lead Shrunk Small Outline PackagePage 39 of General PCB Layout Recommendations For USB Mass Storage DesignsFigure 14. 56-Lead QFN 8 x 8 mm LF56A PCB Material Quad Flat Package No Leads QFN Package Design NotesOther Design Considerations Devices With Small Buffers Disclaimers, Trademarks, and CopyrightsIDE Removable Media Devices Document Number Document History PagedIssue Date ECN NO