Cypress CY7C68321C AC Electrical Characteristics, Ordering Information, Part Number, Package Type

Page 36
AC Electrical Characteristics

CY7C68300C/CY7C68301C

CY7C68320C/CY7C68321C

AC Electrical Characteristics

ATA Timing Characteristics

The ATA interface supports ATA PIO modes 0, 3, and 4, Ultra DMA modes 2, 3, and 4, and multi-word DMA mode 2, per the ATA/ATAPI 6 Specification. The highest enabled transfer rate common to both the AT2LP and the attached mass storage device is used. The AT2LP automatically determines the transfer rates during drive initialization based upon the values

in the AT2LP configuration space and the data reported by the drives in response to an IDENTIFY DEVICE command.

USB Transceiver Characteristics

Complies with the USB 2.0 specification for full- and high-speed modes of operation.

Ordering Information

Part Number

 

Package Type

GPIO Pins

CY7C68300C-56PVXC

56

SSOP Lead-free for self- and bus-powered designs

 

 

 

 

CY7C68301C-56PVXC

56

SSOP Lead-free for battery-powered designs

 

 

 

 

CY7C68300C-56LFXC

56

QFN Lead-free for self- and bus-powered designs

 

 

 

 

CY7C68301C-56LFXC

56

QFN Lead-free for battery-powered designs

 

 

 

 

CY7C68320C-56LFXC

56

QFN Lead-free for self- and bus-powered designs

3[4]

CY7C68320C-56PVXC

56

SSOP Lead-free for self- and bus-powered designs

3[4]

CY7C68321C-56LFXC

56

QFN Lead-free for battery-powered designs

3[4]

CY7C68320C-100AXC

100 TQFP Lead-free for self- and bus-powered designs

6

 

 

 

CY7C68321C-100AXC

100 TQFP Lead-free for battery-powered designs

6

 

 

 

CY4615B

EZ-USB AT2LP Reference Design Kit

n/a

 

 

 

 

Note

4. The General Purpose inputs can be enabled on ATAPUEN, PWR500#, and DRVPWRVLD with EEPROM byte 8, bit 7 on CY7C68320C/CY7C68321C.

Document 001-05809 Rev. *A

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Contents Features Block DiagramCY7C68300C/CY7C68301C CY7C68320C/CY7C68321C EZ-USB AT2LP USB 2.0 to ATA/ATAPI BridgeApplications CY7C68300A CompatibilityIntroduction CY4615C EZ-USB AT2LP Reference Design Kit USB Specification versionEZ-USB AT2LP CY7C68300CCY7C68301C 56-pin SSOPEZ-USB AT2LP CY7C68300C CY7C68301C 56-pin QFN ENABLERESET# DD13EZ-USB AT2LP CY7C68320CCY7C68321C 56-pin SSOPEZ-USB AT2LP CY7C68320C CY7C68321C 56-pin QFN ARESET#GPIO2 DD15100-pin TQFP CY7C68320ACY7C68321A USB D+ signal See “DPLUS, DMINUS” on page USB D-signal See “DPLUS, DMINUS” on pagepage PU 10KCY7C68300C/CY7C68301C CY7C68320C/CY7C68321CChip reset See “RESET#” on page VBUS detection See “VBUSATAENABLE” on“ATAPUEN” on page DPLUS, DMINUSSCL, SDA XTALIN, XTALOUTSYSIRQ USB High-SpeedGPIO Pins ATA Interface PinsDRVPWRVLD LOWPWR#VBUSATAENABLE RESET#ATAPUEN PWR500#HID Functions for Button Controls Functional OverviewATA Command Block ATACB Table 6. ATACB Field Descriptions ByteField Name Field Description5-12 Operating Modes Operational Mode Selection FlowFigure 10. Operational Mode Selection Flow Bulk-Only Transport Specification . There is a vendor-specific Table 7. Command Block WrapperFused Memory Data Normal Mass Storage ModeMfgCB EEPROM Organization Figure 11. Snapshot of ‘AT2LP Blaster’ UtilityEnable a delay of up to 120 ms at each read of the DRQ bit where the device data length does not match the host data“Functional Overview” on page 15 for more detail on how length. This allows the CY7C68300C/CY7C68301C to workDetermines if the AT2LP is to do an SRST reset during drive returned on bits 2, 1, and 0 of EP1IN. This bit must be set to CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration does not exist. The USB Mass Storage Class Bulk-OnlyInterface Descriptor USB Bulk Out EndpointUSB Bulk In Endpoint Terminator Number of the channel, must be a zero based value that is Page 29 ofDescriptor-Index 0 LANGID CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Descriptor-Serial Number unique serial LOADCONFIGDATA Table 12.EEPROM-related Vendor-specific Commands READCONFIGDATALabel bmRequestTypeDC Characteristics Absolute Maximum RatingsOperating Conditions AC Electrical Characteristics Ordering InformationATA Timing Characteristics USB Transceiver CharacteristicsPackage Diagrams Figure 12. 100-Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A101Package Diagrams continued Figure 13. 56-lead Shrunk Small Outline PackageGeneral PCB Layout Recommendations For USB Mass Storage Designs Figure 14. 56-Lead QFN 8 x 8 mm LF56APage 39 of Quad Flat Package No Leads QFN Package Design Notes Other Design ConsiderationsPCB Material Disclaimers, Trademarks, and Copyrights IDE Removable Media DevicesDevices With Small Buffers Document History Paged Issue DateDocument Number ECN NO