Cypress CY7C68300C, CY7C68321C EZ-USB AT2LP, CY7C68301C, pin SSOP, VBUSPWRVALID DA2, GND Reserved

CY7C68300C/CY7C68301C

CY7C68320C/CY7C68321C

Pin Diagrams

The AT2LP is available in different package types to meet a variety of design needs. The CY7C68320C/321C is available in 56-pin QFN and 100-pin TQFP packages to provide the greatest flexibility for new designs. The CY7C68300C/301C is available in 56-pin SSOP and QFN package types to ensure backward compatibility with CY7C68300A designs.

Figure 2. 56-pin SSOP Pinout (CY7C68300C/CY7C68301C only)

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

DD13				DD12
DD14				DD11
DD15				DD10
GND				DD9
ATAPUEN (GND)				DD8
VCC			(ATA_EN) VBUS_ATA_ENABLE
GND				VCC
IORDY				RESET#
DMARQ				GND
AVCC			ARESET#
XTALOUT			(VBUS_PWR_VALID) DA2
XTALIN				CS1#
AGND				CS0#
VCC			(DA2) DRVPWRVLD
DPLUS		EZ-USB AT2LP		DA1
DMINUS			CY7C68300C	DA0
GND				INTRQ
			CY7C68301C
VCC				VCC
GND			56-pin SSOP	DMACK#
PWR500# (PU 10K)				DIOR#
GND (Reserved)				DIOW#
SCL				GND
SDA				VCC
VCC	NOTE: Labels in italics denote pin functionality			GND
		during CY7C68300A compatibility mode.
DD0				DD7
DD1				DD6
DD2				DD5
DD3				DD4

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

Document 001-05809 Rev. *A Page 3 of 42

[+] Feedback