Cypress CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C, EEPROM-related Vendor-specific Commands

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Table 12.EEPROM-related Vendor-specific Commands

CY7C68300C/CY7C68301C

CY7C68320C/CY7C68321C

Legal values for wValue are as follows:

0x0000 Internal Config bytes, address range 0x2 – 0xF

0x0002 External I2C memory device

Internal Config byte writes must be constrained to addresses 0x2 through 0xF, as shown in Table 12. Attempts to write outside this address space result in undefined operation. Internal Config byte writes only overwrite AT2LP Configuration Byte registers, the original data source (I2C memory device) remains unchanged.

Table 12.EEPROM-related Vendor-specific Commands

Label

bmRequestType

bRequest

wValue

wIndex

wLength

Data

LOAD_CONFIG_DATA

0x40

0x01

0x0000

30x02 – 0x0F

Data Length

Configuration

 

 

 

 

 

 

Data

READ_CONFIG_DATA

0xC0

0x02

Data Source

Starting Address

Data Length

Configuration

 

 

 

 

 

 

Data

READ_CONFIG_DATA

This USB request allows data retrieval from the data source specified by the wValue field. Data is retrieved beginning at the address specified by the wIndex field (see Table 12). The wLength field denotes the length in bytes of data requested from the data source.

Legal values for wValue are as follows:

0x0000 Configuration bytes, addresses 0x0 – 0xF only

0x0002 External I2C memory device

Illegal values for wValue result in an undefined operation. Attempted reads from an I2C memory device when none is connected result in an undefined operation. Attempts to read configuration bytes with starting addresses greater than 0xF also, result in an undefined operation.

Document 001-05809 Rev. *A

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Contents CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C FeaturesBlock Diagram EZ-USB AT2LP USB 2.0 to ATA/ATAPI BridgeIntroduction ApplicationsCY7C68300A Compatibility CY4615C EZ-USB AT2LP Reference Design Kit USB Specification versionCY7C68301C EZ-USB AT2LPCY7C68300C 56-pin SSOPRESET# EZ-USB AT2LP CY7C68300C CY7C68301C 56-pin QFNENABLE DD13CY7C68321C EZ-USB AT2LPCY7C68320C 56-pin SSOPGPIO2 EZ-USB AT2LP CY7C68320C CY7C68321C 56-pin QFNARESET# DD15CY7C68320A 100-pin TQFPCY7C68321A page USB D+ signal See “DPLUS, DMINUS” on pageUSB D-signal See “DPLUS, DMINUS” on page PU 10KCY7C68300C/CY7C68301C CY7C68320C/CY7C68321CChip reset See “RESET#” on page VBUS detection See “VBUSATAENABLE” onSCL, SDA “ATAPUEN” on pageDPLUS, DMINUS XTALIN, XTALOUTSYSIRQ USB High-SpeedDRVPWRVLD GPIO PinsATA Interface Pins LOWPWR#ATAPUEN VBUSATAENABLERESET# PWR500#Functional Overview HID Functions for Button ControlsATA Command Block ATACB Field Name Table 6. ATACB Field DescriptionsByte Field Description5-12 Operational Mode Selection Flow Operating ModesFigure 10. Operational Mode Selection Flow Fused Memory Data Bulk-Only Transport Specification . There is a vendor-specificTable 7. Command Block Wrapper Normal Mass Storage ModeMfgCB EEPROM Organization Figure 11. Snapshot of ‘AT2LP Blaster’ Utility“Functional Overview” on page 15 for more detail on how Enable a delay of up to 120 ms at each read of the DRQ bitwhere the device data length does not match the host data length. This allows the CY7C68300C/CY7C68301C to workDetermines if the AT2LP is to do an SRST reset during drive returned on bits 2, 1, and 0 of EP1IN. This bit must be set to CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration does not exist. The USB Mass Storage Class Bulk-OnlyUSB Bulk Out Endpoint Interface DescriptorUSB Bulk In Endpoint Terminator Number of the channel, must be a zero based value that is Page 29 ofDescriptor-Index 0 LANGID CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Descriptor-Serial Number unique serialLOADCONFIGDATA Label Table 12.EEPROM-related Vendor-specific CommandsREADCONFIGDATA bmRequestTypeAbsolute Maximum Ratings DC CharacteristicsOperating Conditions ATA Timing Characteristics AC Electrical CharacteristicsOrdering Information USB Transceiver CharacteristicsPackage Diagrams Figure 12. 100-Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A101Package Diagrams continued Figure 13. 56-lead Shrunk Small Outline PackageFigure 14. 56-Lead QFN 8 x 8 mm LF56A General PCB Layout Recommendations For USB Mass Storage DesignsPage 39 of Other Design Considerations Quad Flat Package No Leads QFN Package Design NotesPCB Material IDE Removable Media Devices Disclaimers, Trademarks, and CopyrightsDevices With Small Buffers Document Number Document History PagedIssue Date ECN NO