Cypress specifications CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C, Loadconfigdata

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LOAD_CONFIG_DATA

CY7C68300C/CY7C68301C

CY7C68320C/CY7C68321C

Table 11.Configuration Data Organization (continued)

Byte

Configuration

Configuration

Required

Variable

Address

Item Name

Item Description

Contents

Contents

 

 

 

 

 

0Xxx

Device name byte 4

ASCII Character

 

’r’ 0x72

0Xxx

Device name byte 5

ASCII Character

 

’e’ 0x65

0Xxx

Device name byte 6

ASCII Character

 

’s’ 0x73

0Xxx

Device name byte 7

ASCII Character

 

’s’ 0x73

0Xxx

Device name byte 8

ASCII Character

 

’ ’ 0x20

0Xxx

Device name byte 9

ASCII Character

 

’C’ 0x43

0Xxx

Device name byte 10

ASCII Character

 

’u’ 0x75

0Xxx

Device name byte 11

ASCII Character

 

’s’ 0x73

0Xxx

Device name byte 12

ASCII Character

 

’t’ 0x74

0Xxx

Device name byte 13

ASCII Character

 

’o’ 0x6f

0Xxx

Device name byte 14

ASCII Character

 

’m’ 0x6d

0Xxx

Device name byte 15

ASCII Character

 

’ ’ 0x20

0Xxx

Device name byte 16

ASCII Character

 

’N’ 0x4e

0Xxx

Device name byte 17

ASCII Character

 

’a’ 0x61

0Xxx

Device name byte 18

ASCII Character

 

’m’ 0x6d

0Xxx

Device name byte 19

ASCII Character

 

’e’ 0x65

0Xxx

Device name byte 20

ASCII Character

 

’ ’ 0x20

0Xxx

Device name byte 21

ASCII Character

 

’L’ 0x4c

0Xxx

Device name byte 22

ASCII Character

 

’U’ 0x55

0Xxx

Device name byte 23

ASCII Character

 

’N’ 0x4e

0Xxx

Device name byte 24

ASCII Character

 

’0’ 0x30

0Xxx

Unused ROM Space

Amount of unused ROM space varies depending on strings.

 

0xFF

 

 

 

 

 

Note: More than 0X100 bytes of configuration are shown for example only. The AT2LP only supports addresses up to 0xFF.

Programming the EEPROM

There are three methods of programming the EEPROM:

Stand-alone EEPROM programmer

Vendor-specific USB commands, listed in Table 12

In-system programming (for example, bed-of-nails tester)

Any vendor-specific USB write request to the Serial ROM device configuration space simultaneously update internal configuration register values as well. If the I2C device is programmed without vendor specific USB commands, the AT2LP must be synchro- nously reset (toggle RESET#) before configuration data is reloaded.

The AT2LP supports a subset of the ’slow mode’ specification (100 KHz) required for 24LCXXB EEPROM family device support. Features such as ’Multi-Master,’ ’Clock Synchronization’ (the SCL pin is output only), ’10-bit addressing,’ and ’CBUS device support’ are not supported. Vendor-specific USB commands allow the AT2LP to address up to 256 bytes of EEPROM data.

LOAD_CONFIG_DATA

This request enables writes to the AT2LP’s configuration data space. The wIndex field specifies the starting address and the wLength field denotes the data length in bytes.

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Contents Block Diagram FeaturesCY7C68300C/CY7C68301C CY7C68320C/CY7C68321C EZ-USB AT2LP USB 2.0 to ATA/ATAPI BridgeCY7C68300A Compatibility ApplicationsIntroduction CY4615C EZ-USB AT2LP Reference Design Kit USB Specification versionCY7C68300C EZ-USB AT2LPCY7C68301C 56-pin SSOPENABLE EZ-USB AT2LP CY7C68300C CY7C68301C 56-pin QFNRESET# DD13CY7C68320C EZ-USB AT2LPCY7C68321C 56-pin SSOPARESET# EZ-USB AT2LP CY7C68320C CY7C68321C 56-pin QFNGPIO2 DD15100-pin TQFP CY7C68320ACY7C68321A USB D-signal See “DPLUS, DMINUS” on page USB D+ signal See “DPLUS, DMINUS” on pagepage PU 10KCY7C68320C/CY7C68321C CY7C68300C/CY7C68301CVBUS detection See “VBUSATAENABLE” on Chip reset See “RESET#” on pageDPLUS, DMINUS “ATAPUEN” on pageSCL, SDA XTALIN, XTALOUTUSB High-Speed SYSIRQATA Interface Pins GPIO PinsDRVPWRVLD LOWPWR#RESET# VBUSATAENABLEATAPUEN PWR500#HID Functions for Button Controls Functional OverviewATA Command Block ATACB Byte Table 6. ATACB Field DescriptionsField Name Field Description5-12 Operating Modes Operational Mode Selection FlowFigure 10. Operational Mode Selection Flow Table 7. Command Block Wrapper Bulk-Only Transport Specification . There is a vendor-specificFused Memory Data Normal Mass Storage ModeMfgCB Figure 11. Snapshot of ‘AT2LP Blaster’ Utility EEPROM Organizationwhere the device data length does not match the host data Enable a delay of up to 120 ms at each read of the DRQ bit“Functional Overview” on page 15 for more detail on how length. This allows the CY7C68300C/CY7C68301C to workDetermines if the AT2LP is to do an SRST reset during drive returned on bits 2, 1, and 0 of EP1IN. This bit must be set to CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C does not exist. The USB Mass Storage Class Bulk-Only ConfigurationInterface Descriptor USB Bulk Out EndpointUSB Bulk In Endpoint Terminator Page 29 of Number of the channel, must be a zero based value that isDescriptor-Index 0 LANGID CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C unique serial Descriptor-Serial NumberLOADCONFIGDATA READCONFIGDATA Table 12.EEPROM-related Vendor-specific CommandsLabel bmRequestTypeDC Characteristics Absolute Maximum RatingsOperating Conditions Ordering Information AC Electrical CharacteristicsATA Timing Characteristics USB Transceiver CharacteristicsFigure 12. 100-Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A101 Package DiagramsFigure 13. 56-lead Shrunk Small Outline Package Package Diagrams continuedGeneral PCB Layout Recommendations For USB Mass Storage Designs Figure 14. 56-Lead QFN 8 x 8 mm LF56APage 39 of Quad Flat Package No Leads QFN Package Design Notes Other Design ConsiderationsPCB Material Disclaimers, Trademarks, and Copyrights IDE Removable Media DevicesDevices With Small Buffers Issue Date Document History PagedDocument Number ECN NO