Cypress specifications CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C, Sysirq, USB High-Speed

Page 12
SYSIRQ

CY7C68300C/CY7C68301C

CY7C68320C/CY7C68321C

SYSIRQ

The SYSIRQ pin provides a way for systems to request service from host software by using the USB Interrupt pipe on endpoint 1 (EP1). If the AT2LP has no pending interrupt data to return, USB interrupt pipe data requests are NAKed. If pending data is available, the AT2LP returns 16 bits of data. This data indicates whether AT2LP is operating in high-speed or full-speed, whether the AT2LP is reporting self-powered or bus-powered operation, and the states of any GPIO pins that are configured as inputs. GPIO pins can be individually set as

inputs or outputs, with byte 0x09 of the configuration data. The state of any GPIO pin that is not set as an input is reported as ‘0’ in the EP1 data.

Table 3 gives the bitmap for the data returned on the interrupt pipe and Figure 8 depicts the latching algorithm incorporated by the AT2LP.

The SYSIRQ pin must be pulled LOW if HID functionality is used. Refer to “HID Functions for Button Controls” on page 15 for more details on HID functionality.

Table 3. Interrupt Data Bitmap

 

 

 

EP1 Data Byte 1

 

 

 

 

 

 

EP1 Data Byte 0

 

 

 

7

6

5

 

4

3

 

2

1

0

7

6

5

 

4

3

 

2

1

0

RESERVED

RESERVED

RESERVED

 

RESERVED

RESERVED

 

RESERVED

USB High-Speed

VBUS Powered

RESERVED

RESERVED

GPIO[5]

 

GPIO[4]

GPIO[3]

 

GPIO[2]

GPIO[1]

GPIO[0]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Document 001-05809 Rev. *A

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Contents Features Block DiagramCY7C68300C/CY7C68301C CY7C68320C/CY7C68321C EZ-USB AT2LP USB 2.0 to ATA/ATAPI BridgeApplications CY7C68300A CompatibilityIntroduction CY4615C EZ-USB AT2LP Reference Design Kit USB Specification versionEZ-USB AT2LP CY7C68300CCY7C68301C 56-pin SSOPEZ-USB AT2LP CY7C68300C CY7C68301C 56-pin QFN ENABLERESET# DD13EZ-USB AT2LP CY7C68320CCY7C68321C 56-pin SSOPEZ-USB AT2LP CY7C68320C CY7C68321C 56-pin QFN ARESET#GPIO2 DD15100-pin TQFP CY7C68320ACY7C68321A USB D+ signal See “DPLUS, DMINUS” on page USB D-signal See “DPLUS, DMINUS” on pagepage PU 10KCY7C68300C/CY7C68301C CY7C68320C/CY7C68321CChip reset See “RESET#” on page VBUS detection See “VBUSATAENABLE” on“ATAPUEN” on page DPLUS, DMINUSSCL, SDA XTALIN, XTALOUTSYSIRQ USB High-SpeedGPIO Pins ATA Interface PinsDRVPWRVLD LOWPWR#VBUSATAENABLE RESET#ATAPUEN PWR500#HID Functions for Button Controls Functional OverviewATA Command Block ATACB Table 6. ATACB Field Descriptions ByteField Name Field Description5-12 Operating Modes Operational Mode Selection FlowFigure 10. Operational Mode Selection Flow Bulk-Only Transport Specification . There is a vendor-specific Table 7. Command Block WrapperFused Memory Data Normal Mass Storage ModeMfgCB EEPROM Organization Figure 11. Snapshot of ‘AT2LP Blaster’ UtilityEnable a delay of up to 120 ms at each read of the DRQ bit where the device data length does not match the host data“Functional Overview” on page 15 for more detail on how length. This allows the CY7C68300C/CY7C68301C to workDetermines if the AT2LP is to do an SRST reset during drive returned on bits 2, 1, and 0 of EP1IN. This bit must be set to CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration does not exist. The USB Mass Storage Class Bulk-OnlyInterface Descriptor USB Bulk Out EndpointUSB Bulk In Endpoint Terminator Number of the channel, must be a zero based value that is Page 29 ofDescriptor-Index 0 LANGID CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Descriptor-Serial Number unique serialLOADCONFIGDATA Table 12.EEPROM-related Vendor-specific Commands READCONFIGDATALabel bmRequestTypeDC Characteristics Absolute Maximum RatingsOperating Conditions AC Electrical Characteristics Ordering InformationATA Timing Characteristics USB Transceiver CharacteristicsPackage Diagrams Figure 12. 100-Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A101Package Diagrams continued Figure 13. 56-lead Shrunk Small Outline PackageGeneral PCB Layout Recommendations For USB Mass Storage Designs Figure 14. 56-Lead QFN 8 x 8 mm LF56APage 39 of Quad Flat Package No Leads QFN Package Design Notes Other Design ConsiderationsPCB Material Disclaimers, Trademarks, and Copyrights IDE Removable Media DevicesDevices With Small Buffers Document History Paged Issue DateDocument Number ECN NO