Cypress specifications CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C, Interface Descriptor

Page 27
Interface Descriptor

CY7C68300C/CY7C68301C

CY7C68320C/CY7C68321C

Table 11.Configuration Data Organization (continued)

 

Byte

Configuration

Configuration

Required

Variable

 

Address

Item Name

Item Description

Contents

Contents

 

 

 

 

 

 

 

0x32

iConfiguration

Index to the configuration string. This entry must equal half

 

0x00

 

 

 

of the address value where the string starts, or 0x00 if the

 

 

 

 

 

string does not exist.

 

 

 

0x33

bmAttributes

Device attributes for this configuration

 

0xC0

 

 

 

Bit 7 Reserved. Must be set to 1

 

 

 

 

 

Bit 6 Self-powered. See Table 4 for reported value

 

 

 

 

 

Bit 5 Remote wakeup. Must be set to 0

 

 

 

 

 

Bits 4–0 Reserved. Must be set to 0

 

 

 

0x34

bMaxPower

Maximum power consumption for this configuration. Units

 

0x01

 

 

 

used are mA*2 (i.e., 0x31 = 98 mA, 0xF9 = 498 mA). The

 

 

 

 

 

value entered here is only used by the 56-pin packages and

 

 

 

 

 

affect the reported value of bit 6 of address 0x33 in that case.

 

 

 

 

 

See Table 4 on page 14 for a description of what value is

 

 

 

 

 

reported to the host by the AT2LP.

 

 

 

Interface and Endpoint Descriptors

 

 

 

 

 

 

 

 

 

Interface Descriptor

 

 

 

 

 

 

 

 

 

 

0x35

bLength

Length of interface descriptor in bytes

0x09

 

 

 

 

 

 

 

 

0x36

bDescriptorType

Descriptor type

0x04

 

 

 

 

 

 

 

 

0x37

bInterfaceNumber

Interface number

0x00

 

 

 

 

 

 

 

 

0x38

bAlternateSetting

Alternate setting

0x00

 

 

 

 

 

 

 

 

0x39

bNumEndpoints

Number of endpoints

 

0x02

 

 

 

 

 

 

 

0x3A

bInterfaceClass

Interface class

0x08

 

 

 

 

 

 

 

 

0x3B

bInterfaceSubClass

Interface subclass

 

0x06

 

 

 

 

 

 

 

0x3C

bInterfaceProtocol

Interface protocol

0x50

 

 

 

 

 

 

 

 

0x3D

iInterface

Index to first interface string. This entry must equal half of

 

0x00

 

 

 

the address value where the string starts or 0x00 if the string

 

 

 

 

 

does not exist.

 

 

 

USB Bulk Out Endpoint

 

 

 

 

 

 

 

 

 

 

0x3E

bLength

Length of this descriptor in bytes

0x07

 

 

 

 

 

 

 

 

0x3F

bDescriptorType

Endpoint descriptor type

0x05

 

 

 

 

 

 

 

 

0x40

bEndpointAddress

This is an Out endpoint, endpoint number 2.

0x02

 

 

 

 

 

 

 

 

0x41

bmAttributes

This is a bulk endpoint.

0x02

 

 

 

 

 

 

 

 

0x42

wMaxPacketSize (LSB)

Max data transfer size. To be set by speed (Full-speed

 

0x00

 

 

 

0x0040; High-speed 0x0200)

 

 

 

0x43

wMaxPacketSize (MSB)

 

0x02

 

 

 

 

 

 

 

 

 

 

0x44

bInterval

High-speed interval for polling (maximum NAK rate)

0x00

 

 

 

 

 

 

 

 

USB Bulk In Endpoint

 

 

 

 

 

 

 

 

 

 

0x45

bLength

Length of this descriptor in bytes

0x07

 

 

 

 

 

 

 

 

0x46

bDescriptorType

Endpoint descriptor type

0x05

 

 

 

 

 

 

 

 

0x47

bEndpointAddress

This is an In endpoint, endpoint number 6

0x86

 

 

 

 

 

 

 

 

0x48

bmAttributes

This is a bulk endpoint

0x02

 

 

 

 

 

 

 

 

0x49

wMaxPacketSize (LSB)

Max data transfer size. Automatically set by AT2 (Full-speed

 

0x00

 

 

 

0x0040; High-speed 0x0200)

 

 

 

0x4A

wMaxPacketSize (MSB)

 

0x02

 

 

 

 

 

 

 

 

 

 

0x4B

bInterval

High-speed interval for polling (maximum NAK rate)

0x00

 

 

 

 

 

 

 

 

(Optional)

HID Interface Descriptor

 

 

 

 

 

 

 

 

 

 

0x4C

bLength

Length of HID interface descriptor

 

0x09

 

 

 

 

 

 

 

0x4D

bDescriptorTypes

Interface descriptor type

 

0x04

 

 

 

 

 

 

 

0x4E

bInterfaceNumber

Number of interfaces (2)

 

0x02

 

 

 

 

 

 

Document 001-05809 Rev. *A

 

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Contents EZ-USB AT2LP USB 2.0 to ATA/ATAPI Bridge FeaturesBlock Diagram CY7C68300C/CY7C68301C CY7C68320C/CY7C68321CCY4615C EZ-USB AT2LP Reference Design Kit USB Specification version ApplicationsCY7C68300A Compatibility Introduction56-pin SSOP EZ-USB AT2LPCY7C68300C CY7C68301CDD13 EZ-USB AT2LP CY7C68300C CY7C68301C 56-pin QFNENABLE RESET#56-pin SSOP EZ-USB AT2LPCY7C68320C CY7C68321CDD15 EZ-USB AT2LP CY7C68320C CY7C68321C 56-pin QFNARESET# GPIO2100-pin TQFP CY7C68320ACY7C68321A PU 10K USB D+ signal See “DPLUS, DMINUS” on pageUSB D-signal See “DPLUS, DMINUS” on page pageCY7C68320C/CY7C68321C CY7C68300C/CY7C68301CVBUS detection See “VBUSATAENABLE” on Chip reset See “RESET#” on pageXTALIN, XTALOUT “ATAPUEN” on pageDPLUS, DMINUS SCL, SDAUSB High-Speed SYSIRQLOWPWR# GPIO PinsATA Interface Pins DRVPWRVLDPWR500# VBUSATAENABLERESET# ATAPUENHID Functions for Button Controls Functional OverviewATA Command Block ATACB Field Description Table 6. ATACB Field DescriptionsByte Field Name5-12 Operating Modes Operational Mode Selection FlowFigure 10. Operational Mode Selection Flow Normal Mass Storage Mode Bulk-Only Transport Specification . There is a vendor-specificTable 7. Command Block Wrapper Fused Memory DataMfgCB Figure 11. Snapshot of ‘AT2LP Blaster’ Utility EEPROM Organizationlength. This allows the CY7C68300C/CY7C68301C to work Enable a delay of up to 120 ms at each read of the DRQ bitwhere the device data length does not match the host data “Functional Overview” on page 15 for more detail on howDetermines if the AT2LP is to do an SRST reset during drive returned on bits 2, 1, and 0 of EP1IN. This bit must be set to CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C does not exist. The USB Mass Storage Class Bulk-Only ConfigurationInterface Descriptor USB Bulk Out EndpointUSB Bulk In Endpoint Terminator Page 29 of Number of the channel, must be a zero based value that isDescriptor-Index 0 LANGID CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C unique serial Descriptor-Serial NumberLOADCONFIGDATA bmRequestType Table 12.EEPROM-related Vendor-specific CommandsREADCONFIGDATA LabelDC Characteristics Absolute Maximum RatingsOperating Conditions USB Transceiver Characteristics AC Electrical CharacteristicsOrdering Information ATA Timing CharacteristicsFigure 12. 100-Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A101 Package DiagramsFigure 13. 56-lead Shrunk Small Outline Package Package Diagrams continuedGeneral PCB Layout Recommendations For USB Mass Storage Designs Figure 14. 56-Lead QFN 8 x 8 mm LF56APage 39 of Quad Flat Package No Leads QFN Package Design Notes Other Design ConsiderationsPCB Material Disclaimers, Trademarks, and Copyrights IDE Removable Media DevicesDevices With Small Buffers ECN NO Document History PagedIssue Date Document Number