Cypress CY7C67300 manual Sof/Eop

Page 94

 

 

 

 

 

 

 

 

 

 

 

 

CY7C67300

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 142.

Register Summary (continued)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

Address

Register

 

 

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Default High

 

 

 

 

 

 

 

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Default Low

 

 

R/W

0xC07E

HSS Transmit Counter

 

 

Reserved

 

 

 

 

 

Counter...

 

0000 0000

 

 

 

 

 

 

 

...Counter

 

 

 

 

 

 

 

0000 0000

 

 

R/W

0xC080

Host n Control

 

 

Reserved

 

 

 

 

 

 

 

0000 0000

 

 

 

0xC0A0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Preamble

Sequence

Sync

ISO

Reserved

 

 

Arm

0000 0000

 

 

 

 

 

 

 

Enable

Select

Enable

Enable

 

 

 

Enable

 

 

 

R/W

0xC082

Host n Address

 

 

Address...

 

 

 

 

 

 

 

0000 0000

 

 

 

0xC0A2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

...Address

 

 

 

 

 

 

 

0000 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

0xC084

Host n Count

 

 

Reserved

Port Select

Reserved

 

 

 

Count...

 

0000 0000

 

 

 

0xC0A4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

...Count

 

 

 

 

 

 

 

0000 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

0xC084

Device n Port Select

 

 

Reserved

Port Select

Reserved...

 

 

 

 

 

0000 0000

 

 

 

0xC0A4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

...Reserved

 

 

 

 

 

 

 

0000 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R

0xC086

Host n PID

 

 

Reserved

 

 

 

Overflow

Underflow

Reserved

 

0000 0000

 

 

 

0xC0A6

 

 

 

 

 

 

 

Flag

Flag

 

 

 

 

 

 

 

 

 

 

Stall

NAK

Length

Reserved

Sequence

Timeout

Error

ACK

0000 0000

 

 

 

 

 

 

 

Flag

Flag

Exception Flag

 

Status

Flag

Flag

Flag

 

 

 

W

0xC086

Host n EP Status

 

 

Reserved

 

 

 

 

 

 

 

0000 0000

 

 

 

0xC0A4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PID Select

 

 

 

Endpoint Select

 

 

0000 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R

0xC088

Host n Count Result

 

 

Result...

 

 

 

 

 

 

 

0000 0000

 

 

 

0xC0A8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

...Result

 

 

 

 

 

 

 

0000 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

W

0xC088

Host n Device Address

 

 

Reserved...

 

 

 

 

 

 

 

0000 0000

 

 

 

0xC0A8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

...Reserved

Address

 

 

 

 

 

 

0000 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

0xC08A

USB n Control

 

 

Port B

Port B

Port A

Port A

LOB

LOA

Mode

Port B Resis-

xxxx 0000

 

 

 

0xC0AA

 

 

 

D+ Status

D– Status

D+ Status

D– Status

 

 

Select

tors Enable

 

 

 

 

 

 

 

 

Port A

Port B

 

Port A

 

Suspend

Port B

Port A

0000 0000

 

 

 

 

 

 

 

Resistors

Force D+/-

 

Force D±

 

Enable

SOF/EOP

SOF/EOP

 

 

 

 

 

 

 

 

Enable

State

 

State

 

 

Enable

Enable

 

 

 

R/W

0xC08C

Host 1 Interrupt Enable

 

 

VBUS

ID

Reserved

 

 

 

SOF/EOP

Reserved

0000 0000

 

 

 

 

 

 

 

Interrupt

Interrupt

 

 

 

 

Interrupt

 

 

 

 

 

 

 

 

 

Enable

Enable

 

 

 

 

Enable

 

 

 

 

 

 

 

 

 

Port B

Port A

Port B Connect

Port A Con-

Reserved

 

 

Done

0000 0000

 

 

 

 

 

 

 

Wake Interrupt

Wake Interrupt

Change

nect Change

 

 

 

Interrupt

 

 

 

 

 

 

 

 

Enable

Enable

Interrupt En-

Interrupt

 

 

 

Enable

 

 

 

 

 

 

 

 

 

 

able

Enable

 

 

 

 

 

 

 

R/W

0xC08C

Device 1 Interrupt Enable

 

 

VBUS

ID

Reserved

 

SOF/EOP

Reserved

SOF/EOP

Reset

0000 0000

 

 

 

 

 

 

 

Interrupt

Interrupt

 

 

Timeout In-

 

Interrupt

Interrupt

 

 

 

 

 

 

 

 

Enable

Enable

 

 

terrupt En-

 

Enable

Enable

 

 

 

 

 

 

 

 

 

 

 

 

able

 

 

 

 

 

 

 

 

 

 

 

EP7

EP6

EP5

EP4

EP3

EP2

EP1

EP0

0000 0000

 

 

 

 

 

 

 

Interrupt

Interrupt

Interrupt

Interrupt

Interrupt

Interrupt

Interrupt

Interrupt

 

 

 

 

 

 

 

 

Enable

Enable

Enable

Enable

Enable

Enable

Enable

Enable

 

 

 

R/W

0xC08E

Device n Address

 

 

Reserved...

 

 

 

 

 

 

 

0000 0000

 

 

 

0xC0AE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

...Reserved

Address

 

 

 

 

 

 

0000 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

0xC090

Host 1 Status

 

 

VBUS

ID

Reserved

 

 

 

SOF/EOP

Reserved

xxxx xxxx

 

 

 

 

 

 

 

Interrupt Flag

Interrupt Flag

 

 

 

 

Interrupt Flag

 

 

 

 

 

 

 

 

 

Port B

Port A

Port B Connect

Port A Con-

Port B

Port A

Reserved

Done

xxxx xxxx

 

 

 

 

 

 

 

Wake Interrupt

Wake Interrupt

Change

nect Change

SE0

SE0

 

Interrupt

 

 

 

 

 

 

 

 

Flag

Flag

Interrupt Flag

Interrupt Flag

Status

Status

 

Flag

 

 

 

R/W

0xC090

Device 1 Status

 

 

VBUS

ID

Reserved

 

 

 

SOF/EOP

Reset

xxxx xxxx

 

 

 

 

 

 

Interrupt Flag

Interrupt Flag

 

 

 

 

Interrupt Flag

Interrupt Flag

 

 

 

 

 

 

 

 

EP7

EP6

EP5

EP4

EP3

EP2

EP1

EP0

xxxx xxxx

 

 

 

 

 

 

 

Interrupt Flag

Interrupt Flag

Interrupt Flag

Interrupt Flag

Interrupt Flag

Interrupt Flag

Interrupt Flag

Interrupt Flag

 

 

 

R/W

0xC092

Host n SOF/EOP Count

 

 

Reserved

 

Count...

 

 

 

 

 

0010 1110

 

 

 

0xC0B2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

...Count

 

 

 

 

 

 

 

1110 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R

0xC092

Device n Frame Number

 

 

SOF/EOP

SOF/EOP

 

 

Reserved

Frame...

 

 

0000 0000

 

 

 

0xC0B2

 

 

 

Timeout

Timeout

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Flag

Interrupt Count

 

 

 

 

 

 

 

 

 

 

 

 

 

 

...Frame

 

 

 

 

 

 

 

0000 0000

 

 

R

0xC094

Host n SOF/EOP Counter

 

 

Reserved

 

Counter...

 

 

 

 

 

xxxx xxxx

 

 

 

0xC0B4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

...Counter

 

 

 

 

 

 

 

xxxx xxxx

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

W

0xC094

Device n SOF/EOP Count

 

 

Reserved

 

Count...

 

 

 

 

 

0010 1110

 

 

 

0xC0B4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

...Count

 

 

 

 

 

 

 

1110 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R

0xC096

Host n Frame

 

 

Reserved

 

 

 

 

Frame...

 

 

0000 0000

 

 

 

0xC0B6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

...Frame

 

 

 

 

 

 

 

0000 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

0xC0AC

Host 2 Interrupt Enable

 

 

Reserved

 

 

 

 

 

SOF/EOP

Reserved

0000 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

Interrupt

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Enable

 

 

 

 

 

 

 

 

 

Port B

Port A

Port B Connect

Port A Con-

Reserved

 

 

Done

0000 0000

 

 

 

 

 

 

 

Wake Interrupt

Wake Interrupt

Change

nect Change

 

 

 

Interrupt

 

 

 

 

 

 

 

 

Enable

Enable

Interrupt

Interrupt

 

 

 

Enable

 

 

 

 

 

 

 

 

 

 

Enable

Enable

 

 

 

 

 

 

 

Document #: 38-08015 Rev. *J

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Contents CY7C67300 Block Diagram EZ-Host FeaturesTypical Applications Functional Overview IntroductionInterface Descriptions Interface Options for External Memory Bus Pins MEM Pins USB InterfaceOTG Interface Pins Pin Name Pin Number USB Interface Pins Pin Name Pin NumberOTG Interface External Memory Interface External Memory Interface Block Diagrams External Memory Interface PinsExternal Memory Interface Pins Pin Name Pin Number Up to 256k x 16 External Code/Data Page ModeI2C Eeprom Interface General Purpose IO Interface GpioUart Interface Serial Peripheral InterfaceHigh-Speed Serial Interface Programmable Pulse/PWM InterfaceHost Port Interface HPI Interface Pins 3 Pin Name Pin NumberHPI Interface Pins 3 IDE InterfaceCharge Pump Interface Pins Pin Name Pin Number IDE Throughput ModeIDE Interface Pins Pin Name Pin Number ActualCrystal Pins Pin Name Pin Number Booster PinsCrystal Pins Booster InterfaceBoot Mode Boot Configuration InterfaceBoot Configuration Interface Operational ModesPower Saving Mode Description Power Savings and Reset DescriptionSleep Memory Map Bank Selected 0xC018 0xC01A Document # 38-08015 Rev. *JPage 15Registers Processor Control RegistersReserved Bank RegisterBank Register Example Hex Value Binary Value Revision RegisterCPU Speed Definition Processor Speed Host/Device 2A Wake Enable Bit Power Control RegisterHost/Device 2B Wake Enable Bit Host/Device 1B Wake Enable BitOTG Interrupt Enable Bit Sleep Enable BitInterrupt Enable Register Halt Enable Bit SPI Interrupt Enable BitOut Mailbox Interrupt Enable Bit HSS Interrupt Enable BitMailbox Interrupt Enable Bit Uart Interrupt Enable BitPort 2A Diagnostic Enable Bit USB Diagnostic RegisterPort 2B Diagnostic Enable Bit Port 1B Diagnostic Enable BitExternal Memory Registers Extended Page n Map Register R/W Upper Address Enable Register 0xC038 R/WUpper Address Enable Bit Extended Page n Map RegisterTimer Registers Lock Enable Bit Watchdog Timer RegisterTimeout Flag Bit WDT Enable BitUSB n Control Register Timer n RegisterGeneral USB Registers Port B D+ Status BitPort a Resistors Enable Bit Mode Select BitPort B Resistors Enable Bit EnableUSB Host Only Registers Port a SOF/EOP Enable Bit ReservedPreamble Enable Bit USB Host Only Register Register Name Address Host 1/HostArm Enable Bit Sync Enable BitHost n Address Register ISO Enable Bit Sequence Select BitStall Flag Bit Port Select BitUnderflow Flag Bit NAK Flag BitHost n PID Register W Error Flag BitSequence Status Bit Host n PID RegisterHost n Count Result Register R PID Select DefinitionPID Select Host n Count Result Register Endpoint Select BitsID Interrupt Enable Bit Host n Interrupt Enable RegisterVbus Interrupt Enable Bit Host n Device Address RegisterPort a Wake Interrupt Enable Bit SOF/EOP Interrupt Enable BitPort B Wake Interrupt Enable Bit Port B Connect Change Interrupt Enable BitPort a Wake Interrupt Flag Bit SOF/EOP Interrupt Flag BitPort B Wake Interrupt Flag Bit Port B Connect Change Interrupt Flag BitHost n Frame Register R Host n SOF/EOP Counter Register RHost n SOF/EOP Counter Register Host 1 Frame Register 0xC096 Host 2 Frame Register 0xC0B6Device n Endpoint n Control Register R/W IN/OUT Ignore Enable BitUSB Device Only Registers Device n Endpoint n Control RegisterEnable Bit Stall Enable BitNAK Interrupt Enable Bit Direction Select BitDevice n Endpoint n Count Register R/W Device n Endpoint n Count RegisterOUT Exception Flag Bit Device n Endpoint n Status Register R/WDevice n Endpoint n Status Register Exception Flag BitDevice n Endpoint n Count Result Register R/W Setup Flag BitSequence Flag Bit Device n Endpoint n Count Result RegisterDevice n Port Select Register R/W Device n Interrupt Enable Register R/WDevice n Interrupt Enable Register Port Select Bit Device n Port Select RegisterEP7 Interrupt Enable Bit SOF/EOP Timeout Interrupt Enable BitReset Interrupt Enable Bit EP6 Interrupt Enable BitDevice n Address Register EP0 Interrupt Enable BitDevice n Address Register W Device n Status Register R/WEP6 Interrupt Flag Bit Reset Interrupt Flag BitEP7 Interrupt Flag Bit EP5 Interrupt Flag BitEP2 Interrupt Flag Bit SOF/EOP Timeout Flag BitSOF/EOP Timeout Interrupt Counter Bits EP1 Interrupt Flag BitDevice n SOF/EOP Count Register Vbus Pull-up Enable BitOTG Control Registers OTG Control Register ReservedGpio Registers Mode Select Definition Gpio Configuration 108 Write Protect Enable BitSAS Enable Bit HSS Enable BitGpio n Output Data Register Interrupt 0 Enable BitInterrupt 0 Polarity Select Bit Reserved Gpio n Input Data RegisterIDE Registers IDE Start Address Register 0xC04A R/W Mode Select DefinitionIDE Start Address Register IDE Stop Address Register IDE Interrupt Enable BitIDE Enable Bit IDE Control RegisterIDE PIO Port Registers 0xC050 0xC06F R/W HSS RegistersHSS Registers Register Name Address Receive Interrupt Enable Bit Xoff Enable BitCTS Enable Bit HSS Control RegisterReceive Overflow Flag Bit Packet Mode Select BitTransmit Ready Bit HSS Baud Rate RegisterTransmit Gap Select Bits HSS Transmit Gap Register 0xC074 R/WHSS Transmit Gap Register HSS Data Register 0xC076 R/WHSS Receive Counter Register 0xC07A R/W HSS Receive Counter RegisterHSS Transmit Counter Register 0xC07E R/W HSS Transmit Address Register 0xC07C R/WHSS Transmit Address Register HSS Transmit Counter RegisterHPI Breakpoint Register HPI Registers Register Name Address Vbus to HPI Enable BitHPI Registers Interrupt Routing RegisterSOF/EOP2 to CPU Enable Bit ID to HPI Enable BitSOF/EOP2 to HPI Enable Bit SOF/EOP1 to HPI Enable BitSIEXmsg Register SIEXmsg Register WSIE1msg Register SIE2msg Register HPI Mailbox Register 0xC0C6 R/WVbus Flag Bit Reset2 Flag BitHPI Status Port ID Flag BitDone1 Flag Bit Reset1 Flag BitSPI Registers Mailbox Out Flag BitMaster Active Enable Bit 3Wire Enable BitPhase Select Bit Master Enable BitSPI Control Register Byte Mode BitRead Enable Bit SCK Strobe BitTransfer Interrupt Enable Bit SPI Interrupt Enable RegisterTransmit Interrupt Enable Bit Fifo Error Flag BitSPI Interrupt Clear Register Receive Interrupt Flag BitTransmit Interrupt Flag Bit Transfer Interrupt Flag BitCRC Clear Bit CRC Mode Definition CRCMode CRC Polynomial 1514CRC Enable Bit SPI CRC Value Register Receive CRC BitSPI Transmit Address Register 0xC0D8 R/W SPI Data Register 0xC0D6 R/WSPI Data Register SPI Transmit Address RegisterSPI Receive Address Register SPI Transmit Count RegisterSPI Receive Count Register Uart Registers Receive buffer full Receive buffer empty Uart Status Register 0xC0E2 RUart Status Register Uart Data Register 0xC0E4 R/WPWM Registers Register Name Address PWM Enable BitPWM Registers PWM Control RegisterPWM 1 Enable Bit PWM 3 Enable BitPWM 2 Enable Bit PWM 0 Enable BitPWM n Stop Register R/W PWM n Start Register R/WPWM n Start Register PWM n Stop RegisterPWM Cycle Count Register 0xC0FA R/W PWM Cycle Count RegisterPin Descriptions Pin DiagramPin Descriptions Name Type SCK SPI SCK D11/MOSIMosi SPI Mosi D8/MISOGPIO27/RX GPIO29/OTGIDGPIO28/TX GPIO26/CTS/PWM3Booster Power input 2.7V to Tie to Gnd for normal operationOperating Conditions DC CharacteristicsAbsolute Maximum Ratings Crystal Requirements XTALIN, XtaloutUSB Transceiver GNDReset Timing AC Timing CharacteristicsClock Timing Sram Read Cycle Parameters Description Min Typical Max Unit Sram Read Cycle15LOW Parameter Description Min Typical Max Unit Sram Write CycleSram Write Cycle Parameters HighSCL I2C Eeprom Timing-Serial IOSDA OUT HPI Host Port Interface Write Cycle Timing Read Pulse Width Chip Select Hold Data Access Time, from HPInRD fallingHPI Host Port Interface Read Cycle Timing Read Cycle TimeHSS Byte and Block Mode Receive HSS Byte Mode TransmitHSS Block Mode Transmit IDE TimingHardware CTS/RTS Handshake Register SummaryRegister Summary HSS SOF/EOP CRC SOF/EOP2 Ordering Information Ordering Code Package Type Package DiagramsOrdering Information Pb-FreeDocument History Orig. Submis Description of Change Sion DateWorldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal InformationUSB
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