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CY7C67300
Peripheral Controller with Automotive AEC Grade Support
EZ-Host Features
■Single chip programmable USB
■Support for USB
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■Configurable IO block supporting a variety of IO options or up to 32 bits of General Purpose IO (GPIO)
■4K x 16 internal masked ROM containing built in BIOS that supports a communication ready state with access to I2C™ EEPROM Interface, external ROM, UART, or USB
■8K x 16 internal RAM for code and data buffering
■Extended memory interface port for external SRAM and ROM
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■Fast serial port supports from 9600 baud to 2.0M baud
■SPI support in both master and slave
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■Supports 12 MHz external crystal or clock
■3.3V operation
■Automotive AEC grade option
■Package
Typical Applications
■Set top boxes
■Printers
■KVM switches
■Kiosks
■Automotive applications
■Wireless access points
CY7C67300 Block Diagram
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| CY7C67300 |
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| nRESET | Control |
| Timer 0 | Timer 1 | UART I/F |
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| I2C |
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| Watchdog | CY16 |
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| EEPROM I/F | PINS |
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| HSS I/F |
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| Vbus, ID |
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| INPUT/OUTPUT |
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| OTG |
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| PWM |
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| D+,D- |
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| SIE1 |
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| GPIO [31:0] | |
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| SPI I/F |
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Host/ | D+,D- |
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| SHARED |
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Peripheral |
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| IDE I/F |
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USB Ports |
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| D+,D- |
| 4Kx16 | 8Kx16 |
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| SIE2 | ROM BIOS | RAM | HPI I/F |
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| D+,D- |
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| GPIO |
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| Mobile | External MEM I/F |
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| X1 |
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| PLL |
| Power |
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| X2 |
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| Booster |
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| SHARED INPUT/OUTPUT PINS |
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| A[15:0] | D[15:0] | CTRL[9:0] |
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Cypress Semiconductor Corporation | • | 198 Champion Court | • | San Jose, CA | • | |||||
Document #: |
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| Revised July 28, 2008 |
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