Cypress CY7C67300 manual Processor Control Registers

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CY7C67300

Registers

Some registers have different functions for a read vs. a write access or USB host vs. USB device mode. Therefore, registers of this type have multiple definitions for the same address.

The default register values listed in this data sheet may be altered to some other value during the BIOS initialization. Refer to the BIOS documentation for register initialization information.

Processor Control Registers

There are nine registers dedicated to general processor control. Each of these registers are covered in this section and are summarized in Table 21.

CPU Flags Register [0xC000] [R]

Table 22. CPU Flags Register

Table 21. Processor Control Registers

Register Name	Address	R/W
CPU Flags Register	0xC000	R

Register Bank Register	0xC002	R/W

Hardware Revision Register	0xC004	R

CPU Speed Register	0xC008	R/W

Power Control Register	0xC00A	R/W

Interrupt Enable Register	0xC00E	R/W

Breakpoint Register	0xC014	R/W

USB Diagnostic Register	0xC03C	W

Memory Diagnostic Register	0xC03E	W

Bit #	15	14	13	12		11	10	9	8
Field					Reserved...
Read/Write	-	-	-	-		-	-	-	-
Default	0	0	0	0		0	0	0	0

Bit #	7	6	5	4	3	2	1	0
		...Reserved		Global	Negative	Overflow	Carry	Zero
Field				Interrupt	Flag	Flag	Flag	Flag
Field				Enable
Read/Write	-	-	-	R	R	R	R	R
Default	0	0	0	X	X	X	X	X

Register Description

The CPU Flags register is a read only register that gives processor flags status.

Global Interrupt Enable (Bit 4)

The Global Interrupt Enable bit indicates if the Global Interrupts are enabled.

1:Enabled

0:Disabled

Negative Flag (Bit 3)

The Negative Flag bit indicates if an arithmetic operation results in a negative answer.

1:MS result bit is ‘1’

0:MS result bit is not ‘1’

Overflow Flag (Bit 2)

The Overflow Flag bit indicates if an overflow condition occurred. An overflow condition can occur if an arithmetic result was either larger than the destination operand size (for addition) or smaller than the destination operand must allow for subtraction.

1:Overflow occurred

0:Overflow did not occur

Carry Flag (Bit 1)

The Carry Flag bit indicates if an arithmetic operation resulted in a Carry for addition, or Borrow for subtraction.

1:Carry/Borrow occurred

0:Carry/Borrow did not occur

Zero Flag (Bit 0)

The Zero Flag bit indicates if an instruction execution resulted in a ‘0’.

1:Zero occurred

0:Zero did not occur

Document #: 38-08015 Rev. *J

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Contents CY7C67300 Block Diagram EZ-Host FeaturesTypical Applications Functional Overview IntroductionInterface Descriptions Interface Options for External Memory Bus Pins MEM Pins USB InterfaceOTG Interface Pins Pin Name Pin Number USB Interface Pins Pin Name Pin NumberOTG Interface External Memory Interface External Memory Interface Pins External Memory Interface Pins Pin Name Pin NumberExternal Memory Interface Block Diagrams Up to 256k x 16 External Code/Data Page ModeGeneral Purpose IO Interface Gpio Uart InterfaceI2C Eeprom Interface Serial Peripheral InterfaceHigh-Speed Serial Interface Programmable Pulse/PWM InterfaceHPI Interface Pins 3 Pin Name Pin Number HPI Interface Pins 3Host Port Interface IDE InterfaceIDE Throughput Mode IDE Interface Pins Pin Name Pin NumberCharge Pump Interface Pins Pin Name Pin Number ActualBooster Pins Crystal PinsCrystal Pins Pin Name Pin Number Booster InterfaceBoot Configuration Interface Boot Configuration InterfaceBoot Mode Operational ModesPower Saving Mode Description Power Savings and Reset DescriptionSleep Memory Map Bank Selected 0xC018 0xC01A Document # 38-08015 Rev. *JPage 15Registers Processor Control RegistersBank Register Bank Register Example Hex Value Binary ValueReserved Revision RegisterCPU Speed Definition Processor Speed Power Control Register Host/Device 2B Wake Enable BitHost/Device 2A Wake Enable Bit Host/Device 1B Wake Enable BitSleep Enable Bit Interrupt Enable Register Halt Enable BitOTG Interrupt Enable Bit SPI Interrupt Enable BitHSS Interrupt Enable Bit Mailbox Interrupt Enable BitOut Mailbox Interrupt Enable Bit Uart Interrupt Enable BitUSB Diagnostic Register Port 2B Diagnostic Enable BitPort 2A Diagnostic Enable Bit Port 1B Diagnostic Enable BitExternal Memory Registers Upper Address Enable Register 0xC038 R/W Upper Address Enable BitExtended Page n Map Register R/W Extended Page n Map RegisterTimer Registers Watchdog Timer Register Timeout Flag BitLock Enable Bit WDT Enable BitTimer n Register General USB RegistersUSB n Control Register Port B D+ Status BitMode Select Bit Port B Resistors Enable BitPort a Resistors Enable Bit EnablePort a SOF/EOP Enable Bit Reserved Preamble Enable BitUSB Host Only Registers USB Host Only Register Register Name Address Host 1/HostSync Enable Bit Host n Address Register ISO Enable BitArm Enable Bit Sequence Select BitPort Select Bit Underflow Flag BitStall Flag Bit NAK Flag BitError Flag Bit Sequence Status BitHost n PID Register W Host n PID RegisterPID Select Definition PID SelectHost n Count Result Register R Host n Count Result Register Endpoint Select BitsHost n Interrupt Enable Register Vbus Interrupt Enable BitID Interrupt Enable Bit Host n Device Address RegisterSOF/EOP Interrupt Enable Bit Port B Wake Interrupt Enable BitPort a Wake Interrupt Enable Bit Port B Connect Change Interrupt Enable BitSOF/EOP Interrupt Flag Bit Port B Wake Interrupt Flag BitPort a Wake Interrupt Flag Bit Port B Connect Change Interrupt Flag BitHost n SOF/EOP Counter Register R Host n SOF/EOP Counter RegisterHost n Frame Register R Host 1 Frame Register 0xC096 Host 2 Frame Register 0xC0B6IN/OUT Ignore Enable Bit USB Device Only RegistersDevice n Endpoint n Control Register R/W Device n Endpoint n Control RegisterStall Enable Bit NAK Interrupt Enable BitEnable Bit Direction Select BitDevice n Endpoint n Count Register R/W Device n Endpoint n Count RegisterDevice n Endpoint n Status Register R/W Device n Endpoint n Status RegisterOUT Exception Flag Bit Exception Flag BitSetup Flag Bit Sequence Flag BitDevice n Endpoint n Count Result Register R/W Device n Endpoint n Count Result RegisterDevice n Interrupt Enable Register R/W Device n Interrupt Enable Register Port Select BitDevice n Port Select Register R/W Device n Port Select RegisterSOF/EOP Timeout Interrupt Enable Bit Reset Interrupt Enable BitEP7 Interrupt Enable Bit EP6 Interrupt Enable BitEP0 Interrupt Enable Bit Device n Address Register WDevice n Address Register Device n Status Register R/WReset Interrupt Flag Bit EP7 Interrupt Flag BitEP6 Interrupt Flag Bit EP5 Interrupt Flag BitSOF/EOP Timeout Flag Bit SOF/EOP Timeout Interrupt Counter BitsEP2 Interrupt Flag Bit EP1 Interrupt Flag BitVbus Pull-up Enable Bit OTG Control RegistersDevice n SOF/EOP Count Register OTG Control Register ReservedGpio Registers Write Protect Enable Bit SAS Enable BitMode Select Definition Gpio Configuration 108 HSS Enable BitInterrupt 0 Enable Bit Interrupt 0 Polarity Select Bit ReservedGpio n Output Data Register Gpio n Input Data RegisterIDE Registers IDE Start Address Register 0xC04A R/W Mode Select DefinitionIDE Start Address Register IDE Interrupt Enable Bit IDE Enable BitIDE Stop Address Register IDE Control RegisterIDE PIO Port Registers 0xC050 0xC06F R/W HSS RegistersHSS Registers Register Name Address Xoff Enable Bit CTS Enable BitReceive Interrupt Enable Bit HSS Control RegisterPacket Mode Select Bit Transmit Ready BitReceive Overflow Flag Bit HSS Baud Rate RegisterHSS Transmit Gap Register 0xC074 R/W HSS Transmit Gap RegisterTransmit Gap Select Bits HSS Data Register 0xC076 R/WHSS Receive Counter Register 0xC07A R/W HSS Receive Counter RegisterHSS Transmit Address Register 0xC07C R/W HSS Transmit Address RegisterHSS Transmit Counter Register 0xC07E R/W HSS Transmit Counter RegisterVbus to HPI Enable Bit HPI RegistersHPI Breakpoint Register HPI Registers Register Name Address Interrupt Routing RegisterID to HPI Enable Bit SOF/EOP2 to HPI Enable BitSOF/EOP2 to CPU Enable Bit SOF/EOP1 to HPI Enable BitSIEXmsg Register W SIE1msg Register SIE2msg RegisterSIEXmsg Register HPI Mailbox Register 0xC0C6 R/WReset2 Flag Bit HPI Status PortVbus Flag Bit ID Flag BitReset1 Flag Bit SPI RegistersDone1 Flag Bit Mailbox Out Flag Bit3Wire Enable Bit Phase Select BitMaster Active Enable Bit Master Enable BitByte Mode Bit Read Enable BitSPI Control Register SCK Strobe BitSPI Interrupt Enable Register Transmit Interrupt Enable BitTransfer Interrupt Enable Bit Fifo Error Flag BitReceive Interrupt Flag Bit Transmit Interrupt Flag BitSPI Interrupt Clear Register Transfer Interrupt Flag BitCRC Mode Definition CRCMode CRC Polynomial 1514 CRC Enable BitCRC Clear Bit SPI CRC Value Register Receive CRC BitSPI Data Register 0xC0D6 R/W SPI Data RegisterSPI Transmit Address Register 0xC0D8 R/W SPI Transmit Address RegisterSPI Receive Address Register SPI Transmit Count RegisterSPI Receive Count Register Uart Registers Uart Status Register 0xC0E2 R Uart Status RegisterReceive buffer full Receive buffer empty Uart Data Register 0xC0E4 R/WPWM Enable Bit PWM RegistersPWM Registers Register Name Address PWM Control RegisterPWM 3 Enable Bit PWM 2 Enable BitPWM 1 Enable Bit PWM 0 Enable BitPWM n Start Register R/W PWM n Start RegisterPWM n Stop Register R/W PWM n Stop RegisterPWM Cycle Count Register 0xC0FA R/W PWM Cycle Count RegisterPin Descriptions Pin DiagramPin Descriptions Name Type D11/MOSI Mosi SPI MosiSCK SPI SCK D8/MISOGPIO29/OTGID GPIO28/TXGPIO27/RX GPIO26/CTS/PWM3Booster Power input 2.7V to Tie to Gnd for normal operationDC Characteristics Absolute Maximum RatingsOperating Conditions Crystal Requirements XTALIN, XtaloutUSB Transceiver GNDReset Timing AC Timing CharacteristicsClock Timing Sram Read Cycle Parameters Description Min Typical Max Unit Sram Read Cycle15LOW Sram Write Cycle Sram Write Cycle ParametersParameter Description Min Typical Max Unit HighSCL I2C Eeprom Timing-Serial IOSDA OUT HPI Host Port Interface Write Cycle Timing Chip Select Hold Data Access Time, from HPInRD falling HPI Host Port Interface Read Cycle TimingRead Pulse Width Read Cycle TimeHSS Byte Mode Transmit HSS Block Mode TransmitHSS Byte and Block Mode Receive IDE TimingHardware CTS/RTS Handshake Register SummaryRegister Summary HSS SOF/EOP CRC SOF/EOP2 Package Diagrams Ordering InformationOrdering Information Ordering Code Package Type Pb-FreeDocument History Orig. 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