Cypress CY8C24123A manual DC Operational Amplifier Specifications, Psrr OA

Page 22

CY8C24123A

CY8C24223A, CY8C24423A

DC Operational Amplifier Specifications

The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C TA 85°C, 3.0V to 3.6V and -40°C TA 85°C, or 2.4V to 3.0V and -40°C TA 85°C, respectively. Typical parameters apply to 5V, 3.3V, and 2.7V at 25°C and are for design guidance only.

The Operational Amplifier is a component of both the Analog Continuous Time PSoC blocks and the Analog Switched Cap PSoC blocks. The guaranteed specifications are measured in the Analog Continuous Time PSoC block. Typical parameters apply to 5V at 25°C and are for design guidance only.

Table 17. 5V DC Operational Amplifier Specifications

Symbol

Description

Min

Typ

Max

Units

Notes

VOSOA

Input Offset Voltage (absolute value)

1.6

10

mV

 

 

Power = Low, Opamp Bias = High

 

 

Power = Medium, Opamp Bias = High

1.3

8

mV

 

 

Power = High, Opamp Bias = High

1.2

7.5

mV

 

 

 

 

 

 

 

 

 

TCVOSOA

Average Input Offset Voltage Drift

7.0

35.0

μV/°C

 

IEBOA

Input Leakage Current (Port 0 Analog Pins)

20

pA

Gross tested to 1 μA

CINOA

Input Capacitance (Port 0 Analog Pins)

4.5

9.5

pF

Package and pin dependent.

 

 

 

 

 

 

Temp = 25°C

VCMOA

Common Mode Voltage Range

0.0

Vdd

V

The common-mode input voltage

 

Common Mode Voltage Range (high power or

0.5

Vdd - 0.5

 

range is measured through an

 

high opamp bias)

 

 

analog output buffer. The

 

 

 

 

 

 

 

 

 

 

 

specification includes the

 

 

 

 

 

 

limitations imposed by the

 

 

 

 

 

 

characteristics of the analog

 

 

 

 

 

 

output buffer.

GOLOA

Open Loop Gain

60

dB

Specification is applicable at high

 

Power = Low, Opamp Bias = High

 

 

 

power. For all other bias modes

 

Power = Medium, Opamp Bias = High

60

 

 

 

(except high power, high opamp

 

Power = High, Opamp Bias = High

80

 

 

 

bias), minimum is 60 dB.

VOHIGHOA

High Output Voltage Swing (internal signals)

Vdd - 0.2

V

 

 

Power = Low, Opamp Bias = High

 

 

Power = Medium, Opamp Bias = High

Vdd - 0.2

V

 

 

Power = High, Opamp Bias = High

Vdd - 0.5

V

 

VOLOWOA

Low Output Voltage Swing (internal signals)

0.2

V

 

 

Power = Low, Opamp Bias = High

 

 

Power = Medium, Opamp Bias = High

0.2

V

 

 

Power = High, Opamp Bias = High

0.5

V

 

ISOA

Supply Current (including associated AGND

 

 

 

 

 

 

buffer)

150

200

μA

 

 

Power = Low, Opamp Bias = High

 

 

Power = Low, Opamp Bias = High

300

400

μA

 

 

Power = Medium, Opamp Bias = High

600

800

μA

 

 

Power = Medium, Opamp Bias = High

1200

1600

μA

 

 

Power = High, Opamp Bias = High

2400

3200

μA

 

 

Power = High, Opamp Bias = High

4600

6400

μA

 

PSRROA

Supply Voltage Rejection Ratio

64

80

dB

Vss VIN (Vdd - 2.25) or

 

 

 

 

 

 

(Vdd - 1.25V) VIN Vdd

Document Number: 38-12028 Rev. *I

Page 22 of 56

[+] Feedback

Image 22
Contents Logic Block Diagram FeaturesCypress Semiconductor Corporation 198 Champion Court PSoC Core PSoC Functional OverviewDigital System Analog System Block Diagram Analog SystemAdditional System Resources PSoC Device Characteristics PSoC PartGetting Started Consultants Technical Support Application NotesDevice Editor Development ToolsPSoC Designer Software Subsystems Design BrowserDevice Editor Designing with User ModulesHardware Tools Application EditorUnits of Measure Document ConventionsAcronyms Used Numeric Naming2PDIP PinoutsPin Part Pinoutt 3SOICSCL, ISSP-SCLK Pin Part PinoutPin Definitions 20-Pin PDIP, SSOP, and Soic SDA, ISSP-SDATAActive High External Reset with Internal CY8C24423A 28-Pin PSoC DeviceTo External Components required Switch Mode Pump SMP ConnectionPin Definitions 32-Pin QFN ExtclkOCD Not for ProductionOCD Hclk OCD CclkRegister Mapping Tables Register ReferenceRegister Conventions Abbreviations UsedName Addr Access Hex Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space ACB01CR2 Cpuf CPUSCR1 CPUSCR0 Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Symbol Description Min Typ Max Units Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Absolute Maximum RatingsDC Electrical Characteristics DC Chip-Level SpecificationsDC General Purpose IO Specifications DC Operational Amplifier Specifications Psrr OAAverage Input Offset Voltage Drift LPC supply current DC Low Power Comparator SpecificationsLow power comparator LPC reference Vdd Voltage range LPC voltage offset Document Number 38-12028 Rev. *IDC Analog Output Buffer Specifications Psrr OBDC Switch Mode Pump Specifications Switching Duty Cycle Switching Frequency MHzOutput Voltage Ripple depends on Agnd = 2 x BandGap BG + Agnd = P24 P24 = Vdd/2 DC Analog Reference SpecificationsBandgap Voltage Reference Agnd = Vdd/2 Agnd = 2 x BandGap Not Allowed Agnd = P24 P24 = Vdd/2CY8C24123A CY8C24223A, CY8C24423A DC Analog PSoC Block Specifications DC POR, SMP, and LVD SpecificationsDC Programming Specifications AC Chip-Level Specifications AC Electrical CharacteristicsDC24M DC12M MHz Refer to the AC Digital Block Nominal SpecificationsCPU Frequency 2.7V Nominal MHz Duty Cycle Jitter12M1P MHz Period Jitter IMOGain Enable32K Select AC General Purpose IO Specifications BW OA AC Operational Amplifier SpecificationsNoise at 1 kHz Power = Medium, Opamp Bias = High NV/rt-HzCY8C24123A CY8C24223A, CY8C24423A Typical Agnd Noise with P24 Bypass Crcprs AC Low Power Comparator SpecificationsAC Digital Block Specifications SpimPRS CRCLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC Analog Output Buffer SpecificationsBW OB AC External Clock Specifications AC Programming Specifications AC I2C SpecificationsBus Free Time Between a Stop and Start Condition Setup Time for Stop ConditionPulse Width of spikes are suppressed by Input filter Packaging Dimensions Packaging InformationPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D Pin 5x5 mm QFN Pin Sawn QFN Package Typical Package Capacitance on Crystal Pins Capacitance on Crystal PinsSolder Reflow Peak Temperature Thermal ImpedancesDevelopment Kits Development Tool SelectionSoftware Evaluation ToolsDevice Programmers Accessories Emulation and ProgrammingEmulation and Programming Accessories Third Party Tools Build a PSoC Emulator into Your BoardOrdering Code Definitions Ordering InformationSawn QFN Document History Orig. Submission Description of Change DateWorldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal InformationUSB

CY8C24123A specifications

The Cypress CY8C24123A is a prominent member of the PSoC (Programmable System-on-Chip) family, which integrates a microcontroller with programmable analog and digital components on a single chip. Designed for low-power applications, the CY8C24123A offers a compelling mix of features and technologies that make it a popular choice for embedded system developers.

One of the standout features of the CY8C24123A is its low power consumption, which allows it to extend battery life in portable applications. It operates at a voltage range of 1.71V to 5.5V, making it versatile for various power supply options. This device is equipped with a 24 MHz CPU that efficiently executes tasks while keeping energy usage minimal.

The chip boasts a rich set of programmable peripherals, including analog components such as operational amplifiers, comparators, and DACs, enabling designers to create custom signal processing pathways. These features are complemented by a variety of digital peripherals, like timers, UART, I2C, and SPI interfaces, which facilitate communication with other devices and microcontrollers. The integration of these components reduces the need for external components, leading to a more compact design and lower overall system costs.

Moreover, the CY8C24123A includes Flash memory (up to 2 KB) and SRAM (256 bytes), providing ample storage for application code and data. This Flash memory is reprogrammable, enabling developers to update their applications easily without needing to replace the chip.

Another defining characteristic of the CY8C24123A is its programmability. The device can be configured and programmed using the Cypress PSoC Designer software, which allows developers to design and simulate their applications in a user-friendly environment. The combination of hardware-based flexibility and software configuration provides a robust platform for creating custom solutions tailored to specific application requirements.

Overall, the Cypress CY8C24123A stands out for its balance of performance, programmability, and power efficiency. Its integration of programmable analog and digital blocks makes it suitable for a wide range of applications, including industrial control, consumer electronics, and automotive systems. The ability to customize the chip's functionality further boosts its appeal, making it an excellent choice for developers seeking a versatile and efficient solution for their embedded projects.