Cypress CY8C24123A manual AC Electrical Characteristics, AC Chip-Level Specifications, DC24M

Page 32

CY8C24123A

CY8C24223A, CY8C24423A

AC Electrical Characteristics

AC Chip-Level Specifications

The following tables list the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C TA 85°C, 3.0V to 3.6V and -40°C TA 85°C, or 2.4V to 3.0V and -40°C TA 85°C, respectively. Typical parameters apply to 5V, 3.3V, and 2.7V at 25°C and are for design guidance only.

Table 31. 5V and 3.3V AC Chip-Level Specifications

Symbol

Description

Min

Typ

Max

Units

Notes

FIMO24

Internal Main Oscillator Frequency for

23.4

24

24.6a,b,c

MHz

Trimmed for 5V or 3.3V operation

 

24 MHz

 

 

 

 

using factory trim values. See Figure

 

 

 

 

 

 

12 on page 18. SLIMO mode = 0.

FIMO6

Internal Main Oscillator Frequency for

5.75

6

6.35a,b,c

MHz

Trimmed for 5V or 3.3V operation

 

6 MHz

 

 

 

 

using factory trim values. See Figure

 

 

 

 

 

 

12 on page 18. SLIMO mode = 1.

FCPU1

CPU Frequency (5V Nominal)

0.93

24

24.6a,b

MHz

 

FCPU2

CPU Frequency (3.3V Nominal)

0.93

12

12.3b,c

MHz

 

F48M

Digital PSoC Block Frequency

0

48

49.2a,b,d

MHz

Refer to the AC Digital Block

 

 

 

 

 

 

Specifications.

F24M

Digital PSoC Block Frequency

0

24

24.6b, d

MHz

 

F32K1

Internal Low Speed Oscillator

15

32

64

kHz

 

 

Frequency

 

 

 

 

 

F32K2

External Crystal Oscillator

32.768

kHz

Accuracy is capacitor and crystal

 

 

 

 

 

 

dependent. 50% duty cycle.

FPLL

PLL Frequency

23.986

MHz

Is a multiple (x732) of crystal

 

 

 

 

 

 

frequency.

Jitter24M2

24 MHz Period Jitter (PLL)

600

ps

 

TPLLSLEW

PLL Lock Time

0.5

10

ms

 

TPLLSLEWSLOW

PLL Lock Time for Low Gain Setting

0.5

50

ms

 

TOS

External Crystal Oscillator Startup to 1%

1700

2620

ms

 

TOSACC

External Crystal Oscillator Startup to

2800

3800

ms

The crystal oscillator frequency is

 

100 ppm

 

 

 

 

within 100 ppm of its final value by the

 

 

 

 

 

 

end of the Tosacc period. Correct

 

 

 

 

 

 

operation assumes a properly loaded

 

 

 

 

 

 

1 uW maximum drive level 32.768

 

 

 

 

 

 

kHz crystal. 3.0V Vdd 5.5V, -40 oC

 

 

 

 

 

 

TA 85 oC.

Jitter32k

32 kHz Period Jitter

100

 

ns

 

TXRST

External Reset Pulse Width

10

μs

 

DC24M

24 MHz Duty Cycle

40

50

60

%

 

Step24M

24 MHz Trim Step Size

50

kHz

 

Fout48M

48 MHz Output Frequency

46.8

48.0

49.2a,c

MHz

Trimmed. Using factory trim values.

Jitter24M1P

24 MHz Period Jitter (IMO)

300

 

ps

 

 

Peak-to-Peak

 

 

 

 

 

Jitter24M1R

24 MHz Period Jitter (IMO) Root Mean

600

ps

 

 

Squared

 

 

 

 

 

FMAX

Maximum frequency of signal on row

12.3

MHz

 

 

input or row output.

 

 

 

 

 

TRAMP

Supply Ramp Time

0

μs

 

a.4.75V < Vdd < 5.25V.

b.Accuracy derived from Internal Main Oscillator with appropriate trim for Vdd range.

c.3.0V < Vdd < 3.6V. See Application Note AN2012 “Adjusting PSoC Microcontroller Trims for Dual Voltage-Range Operation” for information on trimming for operation at 3.3V.

d.See the individual user module data sheets for information on maximum frequencies for user modules.

Document Number: 38-12028 Rev. *I

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Digital System PSoC Functional OverviewPSoC Core Analog System Block Diagram Analog SystemPSoC Device Characteristics PSoC Part Getting StartedAdditional System Resources Consultants Technical Support Application NotesDevelopment Tools PSoC Designer Software SubsystemsDevice Editor Design BrowserDesigning with User Modules Hardware ToolsDevice Editor Application EditorDocument Conventions Acronyms UsedUnits of Measure Numeric NamingPinouts Pin Part Pinoutt2PDIP 3SOICPin Part Pinout Pin Definitions 20-Pin PDIP, SSOP, and SoicSCL, ISSP-SCLK SDA, ISSP-SDATAActive High External Reset with Internal CY8C24423A 28-Pin PSoC DeviceSwitch Mode Pump SMP Connection Pin Definitions 32-Pin QFNTo External Components required ExtclkOCD Not for ProductionOCD Hclk OCD CclkRegister Reference Register ConventionsRegister Mapping Tables Abbreviations UsedName Addr Access Hex Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space ACB01CR2 Cpuf CPUSCR1 CPUSCR0 Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Absolute Maximum Ratings Symbol Description Min Typ UnitsOperating Temperature Symbol Description Min Typ Max Units Absolute Maximum RatingsDC Electrical Characteristics DC Chip-Level SpecificationsDC General Purpose IO Specifications DC Operational Amplifier Specifications Psrr OAAverage Input Offset Voltage Drift DC Low Power Comparator Specifications Low power comparator LPC reference Vdd Voltage rangeLPC supply current LPC voltage offset Document Number 38-12028 Rev. *IDC Analog Output Buffer Specifications Psrr OBDC Switch Mode Pump Specifications Output Voltage Ripple depends on Switching Frequency MHzSwitching Duty Cycle DC Analog Reference Specifications Bandgap Voltage Reference Agnd = Vdd/2Agnd = 2 x BandGap BG + Agnd = P24 P24 = Vdd/2 Agnd = 2 x BandGap Not Allowed Agnd = P24 P24 = Vdd/2CY8C24123A CY8C24223A, CY8C24423A DC Analog PSoC Block Specifications DC POR, SMP, and LVD SpecificationsDC Programming Specifications DC24M AC Electrical CharacteristicsAC Chip-Level Specifications MHz Refer to the AC Digital Block Nominal Specifications CPU Frequency 2.7V NominalDC12M MHz Duty Cycle Jitter12M1P MHz Period Jitter IMO32K Select EnableGain AC General Purpose IO Specifications AC Operational Amplifier Specifications Noise at 1 kHz Power = Medium, Opamp Bias = HighBW OA NV/rt-HzCY8C24123A CY8C24223A, CY8C24423A Typical Agnd Noise with P24 Bypass AC Low Power Comparator Specifications AC Digital Block SpecificationsCrcprs SpimPRS CRCBW OB AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC External Clock Specifications AC Programming Specifications AC I2C SpecificationsPulse Width of spikes are suppressed by Input filter Setup Time for Stop ConditionBus Free Time Between a Stop and Start Condition Packaging Dimensions Packaging InformationPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D Pin 5x5 mm QFN Pin Sawn QFN Package Capacitance on Crystal Pins Solder Reflow Peak TemperatureTypical Package Capacitance on Crystal Pins Thermal ImpedancesDevelopment Tool Selection SoftwareDevelopment Kits Evaluation ToolsAccessories Emulation and Programming Emulation and Programming AccessoriesDevice Programmers Third Party Tools Build a PSoC Emulator into Your BoardSawn QFN Ordering InformationOrdering Code Definitions Document History Orig. Submission Description of Change DateUSB Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions

CY8C24123A specifications

The Cypress CY8C24123A is a prominent member of the PSoC (Programmable System-on-Chip) family, which integrates a microcontroller with programmable analog and digital components on a single chip. Designed for low-power applications, the CY8C24123A offers a compelling mix of features and technologies that make it a popular choice for embedded system developers.

One of the standout features of the CY8C24123A is its low power consumption, which allows it to extend battery life in portable applications. It operates at a voltage range of 1.71V to 5.5V, making it versatile for various power supply options. This device is equipped with a 24 MHz CPU that efficiently executes tasks while keeping energy usage minimal.

The chip boasts a rich set of programmable peripherals, including analog components such as operational amplifiers, comparators, and DACs, enabling designers to create custom signal processing pathways. These features are complemented by a variety of digital peripherals, like timers, UART, I2C, and SPI interfaces, which facilitate communication with other devices and microcontrollers. The integration of these components reduces the need for external components, leading to a more compact design and lower overall system costs.

Moreover, the CY8C24123A includes Flash memory (up to 2 KB) and SRAM (256 bytes), providing ample storage for application code and data. This Flash memory is reprogrammable, enabling developers to update their applications easily without needing to replace the chip.

Another defining characteristic of the CY8C24123A is its programmability. The device can be configured and programmed using the Cypress PSoC Designer software, which allows developers to design and simulate their applications in a user-friendly environment. The combination of hardware-based flexibility and software configuration provides a robust platform for creating custom solutions tailored to specific application requirements.

Overall, the Cypress CY8C24123A stands out for its balance of performance, programmability, and power efficiency. Its integration of programmable analog and digital blocks makes it suitable for a wide range of applications, including industrial control, consumer electronics, and automotive systems. The ability to customize the chip's functionality further boosts its appeal, making it an excellent choice for developers seeking a versatile and efficient solution for their embedded projects.