Cypress CY8C24123A manual Setup Time for Stop Condition

Page 44

CY8C24123A

CY8C24223A, CY8C24423A

Table 48. AC Characteristics of the I2C SDA and SCL Pins for Vdd > 3.0V (continued)

Symbol

Description

Standard Mode

Fast Mode

Units

Min

Max

Min

Max

 

 

 

TSUSTOI2C

Setup Time for STOP Condition

4.0

–

0.6

–

μs

TBUFI2C

Bus Free Time Between a STOP and START

4.7

–

1.3

–

μs

 

Condition

 

 

 

 

 

TSPI2C

Pulse Width of spikes are suppressed by the

–

–

0

50

ns

 

input filter.

 

 

 

 

 

a.A Fast-Mode I2C-bus device can be used in a Standard-Mode I2C-bus system, but the requirement tSU;DAT Š 250 ns must then be met. This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line trmax + tSU;DAT = 1000 + 250 = 1250 ns (according to the Standard-Mode I2C-bus specifica- tion) before the SCL line is released.

Table 49. AC Characteristics of the I2C SDA and SCL Pins for Vdd < 3.0V (Fast Mode Not Supported)

Symbol

Description

Standard Mode

Fast Mode

Units

Min

Max

Min

Max

 

 

 

FSCLI2C

SCL Clock Frequency

0

100

–

–

kHz

THDSTAI2C

Hold Time (repeated) START Condition. After

4.0

–

–

–

μs

 

this period, the first clock pulse is generated.

 

 

 

 

 

TLOWI2C

LOW Period of the SCL Clock

4.7

–

–

–

μs

THIGHI2C

HIGH Period of the SCL Clock

4.0

–

–

–

μs

TSUSTAI2C

Setup Time for a Repeated START Condition

4.7

–

–

–

μs

THDDATI2C

Data Hold Time

0

–

–

–

μs

TSUDATI2C

Data Setup Time

250

–

–

–

ns

TSUSTOI2C

Setup Time for STOP Condition

4.0

–

–

–

μs

TBUFI2C

Bus Free Time Between a STOP and START

4.7

–

–

–

μs

 

Condition

 

 

 

 

 

TSPI2C

Pulse Width of spikes are suppressed by the

–

–

–

–

ns

 

input filter

 

 

 

 

 

 

Figure 22. Definition for Timing for Fast/Standard Mode on the I2C Bus

 

SDA

TLOWI2C

 

 

 

 

 

TSUDATI2C

 

 

 

 

 

SCL

 

 

 

 

S

T

THDDATI2C

T

TSUSTAI2C

 

HDSTAI2C

 

HIGHI2C

 

THDSTAI2C

Sr

TSPI2C

 

TBUFI2C

 

 

TSUSTOI2C

P

S

 

Document Number: 38-12028 Rev. *I

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Digital System PSoC Functional OverviewPSoC Core Analog System Block Diagram Analog SystemPSoC Device Characteristics PSoC Part Getting StartedAdditional System Resources Consultants Technical Support Application NotesDevelopment Tools PSoC Designer Software SubsystemsDevice Editor Design BrowserDesigning with User Modules Hardware ToolsDevice Editor Application EditorDocument Conventions Acronyms UsedUnits of Measure Numeric NamingPinouts Pin Part Pinoutt2PDIP 3SOICPin Part Pinout Pin Definitions 20-Pin PDIP, SSOP, and SoicSCL, ISSP-SCLK SDA, ISSP-SDATAActive High External Reset with Internal CY8C24423A 28-Pin PSoC DeviceSwitch Mode Pump SMP Connection Pin Definitions 32-Pin QFNTo External Components required ExtclkOCD Not for ProductionOCD Hclk OCD CclkRegister Reference Register ConventionsRegister Mapping Tables Abbreviations UsedName Addr Access Hex Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space ACB01CR2 Cpuf CPUSCR1 CPUSCR0 Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Absolute Maximum Ratings Symbol Description Min Typ UnitsOperating Temperature Symbol Description Min Typ Max Units Absolute Maximum RatingsDC Electrical Characteristics DC Chip-Level SpecificationsDC General Purpose IO Specifications DC Operational Amplifier Specifications Psrr OAAverage Input Offset Voltage Drift DC Low Power Comparator Specifications Low power comparator LPC reference Vdd Voltage rangeLPC supply current LPC voltage offset Document Number 38-12028 Rev. *IDC Analog Output Buffer Specifications Psrr OBDC Switch Mode Pump Specifications Output Voltage Ripple depends on Switching Frequency MHzSwitching Duty Cycle DC Analog Reference Specifications Bandgap Voltage Reference Agnd = Vdd/2Agnd = 2 x BandGap BG + Agnd = P24 P24 = Vdd/2 Agnd = 2 x BandGap Not Allowed Agnd = P24 P24 = Vdd/2CY8C24123A CY8C24223A, CY8C24423A DC Analog PSoC Block Specifications DC POR, SMP, and LVD SpecificationsDC Programming Specifications DC24M AC Electrical CharacteristicsAC Chip-Level Specifications MHz Refer to the AC Digital Block Nominal Specifications CPU Frequency 2.7V NominalDC12M MHz Duty Cycle Jitter12M1P MHz Period Jitter IMO32K Select EnableGain AC General Purpose IO Specifications AC Operational Amplifier Specifications Noise at 1 kHz Power = Medium, Opamp Bias = HighBW OA NV/rt-HzCY8C24123A CY8C24223A, CY8C24423A Typical Agnd Noise with P24 Bypass AC Low Power Comparator Specifications AC Digital Block SpecificationsCrcprs SpimPRS CRCBW OB AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC External Clock Specifications AC Programming Specifications AC I2C SpecificationsPulse Width of spikes are suppressed by Input filter Setup Time for Stop ConditionBus Free Time Between a Stop and Start Condition Packaging Dimensions Packaging InformationPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D Pin 5x5 mm QFN Pin Sawn QFN Package Capacitance on Crystal Pins Solder Reflow Peak TemperatureTypical Package Capacitance on Crystal Pins Thermal ImpedancesDevelopment Tool Selection SoftwareDevelopment Kits Evaluation ToolsAccessories Emulation and Programming Emulation and Programming AccessoriesDevice Programmers Third Party Tools Build a PSoC Emulator into Your BoardSawn QFN Ordering InformationOrdering Code Definitions Document History Orig. Submission Description of Change DateUSB Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions

CY8C24123A specifications

The Cypress CY8C24123A is a prominent member of the PSoC (Programmable System-on-Chip) family, which integrates a microcontroller with programmable analog and digital components on a single chip. Designed for low-power applications, the CY8C24123A offers a compelling mix of features and technologies that make it a popular choice for embedded system developers.

One of the standout features of the CY8C24123A is its low power consumption, which allows it to extend battery life in portable applications. It operates at a voltage range of 1.71V to 5.5V, making it versatile for various power supply options. This device is equipped with a 24 MHz CPU that efficiently executes tasks while keeping energy usage minimal.

The chip boasts a rich set of programmable peripherals, including analog components such as operational amplifiers, comparators, and DACs, enabling designers to create custom signal processing pathways. These features are complemented by a variety of digital peripherals, like timers, UART, I2C, and SPI interfaces, which facilitate communication with other devices and microcontrollers. The integration of these components reduces the need for external components, leading to a more compact design and lower overall system costs.

Moreover, the CY8C24123A includes Flash memory (up to 2 KB) and SRAM (256 bytes), providing ample storage for application code and data. This Flash memory is reprogrammable, enabling developers to update their applications easily without needing to replace the chip.

Another defining characteristic of the CY8C24123A is its programmability. The device can be configured and programmed using the Cypress PSoC Designer software, which allows developers to design and simulate their applications in a user-friendly environment. The combination of hardware-based flexibility and software configuration provides a robust platform for creating custom solutions tailored to specific application requirements.

Overall, the Cypress CY8C24123A stands out for its balance of performance, programmability, and power efficiency. Its integration of programmable analog and digital blocks makes it suitable for a wide range of applications, including industrial control, consumer electronics, and automotive systems. The ability to customize the chip's functionality further boosts its appeal, making it an excellent choice for developers seeking a versatile and efficient solution for their embedded projects.
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