Cypress CY8C24123A manual Pin 210-Mil Ssop

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CY8C24123A

CY8C24223A, CY8C24423A

Figure 26. 20-Pin (210-Mil) SSOP

51-85077 *C

Figure 27. 20-Pin (300-Mil) Molded SOIC

51-85024 *C

Document Number: 38-12028 Rev. *I

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Digital System PSoC Functional OverviewPSoC Core Analog System Analog System Block DiagramConsultants Technical Support Application Notes PSoC Device Characteristics PSoC PartGetting Started Additional System ResourcesDesign Browser Development ToolsPSoC Designer Software Subsystems Device EditorApplication Editor Designing with User ModulesHardware Tools Device EditorNumeric Naming Document ConventionsAcronyms Used Units of Measure3SOIC PinoutsPin Part Pinoutt 2PDIPSDA, ISSP-SDATA Pin Part PinoutPin Definitions 20-Pin PDIP, SSOP, and Soic SCL, ISSP-SCLKCY8C24423A 28-Pin PSoC Device Active High External Reset with InternalExtclk Switch Mode Pump SMP ConnectionPin Definitions 32-Pin QFN To External Components requiredNot for Production OCDOCD Cclk OCD HclkAbbreviations Used Register ReferenceRegister Conventions Register Mapping TablesRegister Map Bank 0 Table User Space Name Addr Access HexRegister Map Bank 1 Table Configuration Space ACB01CR2 Cpuf CPUSCR1 CPUSCR0 Units of Measure Symbol Unit of Measure Electrical SpecificationsAbsolute Maximum Ratings Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Operating Temperature Symbol Description Min Typ Max UnitsDC Chip-Level Specifications DC Electrical CharacteristicsDC General Purpose IO Specifications Psrr OA DC Operational Amplifier SpecificationsAverage Input Offset Voltage Drift LPC voltage offset Document Number 38-12028 Rev. *I DC Low Power Comparator SpecificationsLow power comparator LPC reference Vdd Voltage range LPC supply currentPsrr OB DC Analog Output Buffer SpecificationsDC Switch Mode Pump Specifications Output Voltage Ripple depends on Switching Frequency MHzSwitching Duty Cycle Agnd = 2 x BandGap Not Allowed Agnd = P24 P24 = Vdd/2 DC Analog Reference SpecificationsBandgap Voltage Reference Agnd = Vdd/2 Agnd = 2 x BandGap BG + Agnd = P24 P24 = Vdd/2CY8C24123A CY8C24223A, CY8C24423A DC POR, SMP, and LVD Specifications DC Analog PSoC Block SpecificationsDC Programming Specifications DC24M AC Electrical CharacteristicsAC Chip-Level Specifications MHz Duty Cycle Jitter12M1P MHz Period Jitter IMO MHz Refer to the AC Digital Block Nominal SpecificationsCPU Frequency 2.7V Nominal DC12M32K Select EnableGain AC General Purpose IO Specifications NV/rt-Hz AC Operational Amplifier SpecificationsNoise at 1 kHz Power = Medium, Opamp Bias = High BW OACY8C24123A CY8C24223A, CY8C24423A Typical Agnd Noise with P24 Bypass Spim AC Low Power Comparator SpecificationsAC Digital Block Specifications CrcprsCRC PRSBW OB AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC External Clock Specifications AC I2C Specifications AC Programming Specifications Pulse Width of spikes are suppressed by Input filter Setup Time for Stop Condition Bus Free Time Between a Stop and Start Condition Packaging Information Packaging DimensionsPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D Pin 5x5 mm QFN Pin Sawn QFN Package Thermal Impedances Capacitance on Crystal PinsSolder Reflow Peak Temperature Typical Package Capacitance on Crystal PinsEvaluation Tools Development Tool SelectionSoftware Development KitsThird Party Tools Build a PSoC Emulator into Your Board Accessories Emulation and ProgrammingEmulation and Programming Accessories Device ProgrammersSawn QFN Ordering InformationOrdering Code Definitions Orig. Submission Description of Change Date Document HistoryUSB Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions