Cypress CY8C24123A manual Development Tools, PSoC Designer Software Subsystems, Device Editor

Page 5

CY8C24123A CY8C24223A, CY8C24423A

Development Tools

PSoC Designer is a Microsoft® Windows-based, integrated development environment for the Programmable System-on-Chip (PSoC) devices. The PSoC Designer IDE and application runs on Windows NT 4.0, Windows 2000, Windows Millennium (Me), or Windows XP (refer Figure 3).

PSoC Designer helps the customer to select an operating config- uration for the PSoC, write application code that uses the PSoC, and debug the application. This system provides design database management by project, an integrated debugger with In-Circuit Emulator, in-system programming support, and the CYASM macro assembler for the CPUs.

PSoC Designer also supports a high-level C language compiler developed specifically for the devices in the family.

Figure 3. PSoC Designer Subsystems

PSoC

Graphical Designer

Context

Sensitive

Interface

 

Designer

 

Commands

 

Help

 

Results

 

Importable

 

 

 

Design

 

 

 

Database

 

 

 

Device

 

 

PSoC

Database

PSoC

Configuration

 

Sheet

Application

Designer

 

Database

Core

 

 

 

Engine

Manufacturing

Project

 

 

Information

Database

 

 

File

User

 

 

 

Modules

 

 

 

Library

 

 

 

Emulation

In-Circuit

Device

Pod

Emulator

Programmer

PSoC Designer Software Subsystems

Device Editor

The Device Editor subsystem allows the user to select different onboard analog and digital components called user modules using the PSoC blocks. Examples of user modules are ADCs, DACs, Amplifiers, and Filters.

The device editor also supports the easy development of multiple configurations and dynamic reconfiguration. Dynamic configuration allows changing configurations at run time.

PSoC Designer sets up power on initialization tables for selected PSoC block configurations and creates source code for an application framework. The framework contains software to operate the selected components and, if the project uses more than one operating configuration, contains routines to switch between different sets of PSoC block configurations at run time. PSoC Designer can print out a configuration sheet for a given project configuration for use during application programming, in conjunction with the device data sheet. After the framework is generated, the user can add application-specific code to flesh out the framework. It is also possible to change the selected components and regenerate the framework.

Design Browser

The Design Browser allows users to select and import preconfigured designs into the user’s project. Users can easily browse a catalog of preconfigured designs to facilitate time-to-design. Examples provided in the tools include a 300-baud modem, LIN Bus master and slave, fan controller, and magnetic card reader.

Application Editor

In the Application Editor you can edit C language and Assembly language source code. You can also assemble, compile, link, and build.

Assembler. The macro assembler allows the seamless merging of the assembly code with C code. The link libraries automatically use absolute addressing or can be compiled in relative mode, and linked with other software modules to get absolute addressing.

C Language Compiler. A C language compiler is available that supports PSoC family devices. Even if you have never worked in the C language before, the product helps you to quickly create complete C programs for the PSoC family devices.

The embedded, optimizing C compiler provides all the features of C tailored to the PSoC architecture. It comes complete with embedded libraries providing port and bus operations, standard keypad and display support, and extended math functionality.

Document Number: 38-12028 Rev. *I

Page 5 of 56

[+] Feedback

Page 4 Page 6
Image 5
Page 4 Page 6
Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Digital System PSoC Functional OverviewPSoC Core Analog System Analog System Block DiagramGetting Started PSoC Device Characteristics PSoC PartAdditional System Resources Consultants Technical Support Application NotesPSoC Designer Software Subsystems Development ToolsDevice Editor Design BrowserHardware Tools Designing with User ModulesDevice Editor Application EditorAcronyms Used Document ConventionsUnits of Measure Numeric NamingPin Part Pinoutt Pinouts2PDIP 3SOICPin Definitions 20-Pin PDIP, SSOP, and Soic Pin Part PinoutSCL, ISSP-SCLK SDA, ISSP-SDATACY8C24423A 28-Pin PSoC Device Active High External Reset with InternalPin Definitions 32-Pin QFN Switch Mode Pump SMP ConnectionTo External Components required ExtclkNot for Production OCDOCD Cclk OCD HclkRegister Conventions Register ReferenceRegister Mapping Tables Abbreviations UsedRegister Map Bank 0 Table User Space Name Addr Access HexRegister Map Bank 1 Table Configuration Space ACB01CR2 Cpuf CPUSCR1 CPUSCR0 Units of Measure Symbol Unit of Measure Electrical SpecificationsAbsolute Maximum Ratings Symbol Description Min Typ Units Operating TemperatureOperating Temperature Symbol Description Min Typ Max Units Absolute Maximum RatingsDC Chip-Level Specifications DC Electrical CharacteristicsDC General Purpose IO Specifications Psrr OA DC Operational Amplifier SpecificationsAverage Input Offset Voltage Drift Low power comparator LPC reference Vdd Voltage range DC Low Power Comparator SpecificationsLPC supply current LPC voltage offset Document Number 38-12028 Rev. *IPsrr OB DC Analog Output Buffer SpecificationsDC Switch Mode Pump Specifications Output Voltage Ripple depends on Switching Frequency MHzSwitching Duty Cycle Bandgap Voltage Reference Agnd = Vdd/2 DC Analog Reference SpecificationsAgnd = 2 x BandGap BG + Agnd = P24 P24 = Vdd/2 Agnd = 2 x BandGap Not Allowed Agnd = P24 P24 = Vdd/2CY8C24123A CY8C24223A, CY8C24423A DC POR, SMP, and LVD Specifications DC Analog PSoC Block SpecificationsDC Programming Specifications DC24M AC Electrical CharacteristicsAC Chip-Level Specifications CPU Frequency 2.7V Nominal MHz Refer to the AC Digital Block Nominal SpecificationsDC12M MHz Duty Cycle Jitter12M1P MHz Period Jitter IMO32K Select EnableGain AC General Purpose IO Specifications Noise at 1 kHz Power = Medium, Opamp Bias = High AC Operational Amplifier SpecificationsBW OA NV/rt-HzCY8C24123A CY8C24223A, CY8C24423A Typical Agnd Noise with P24 Bypass AC Digital Block Specifications AC Low Power Comparator SpecificationsCrcprs SpimCRC PRSBW OB AC Analog Output Buffer SpecificationsLarge Signal Bandwidth, 1V pp, 3dB BW, 100 pF Load AC External Clock Specifications AC I2C Specifications AC Programming SpecificationsPulse Width of spikes are suppressed by Input filter Setup Time for Stop ConditionBus Free Time Between a Stop and Start Condition Packaging Information Packaging DimensionsPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D Pin 5x5 mm QFN Pin Sawn QFN Package Solder Reflow Peak Temperature Capacitance on Crystal PinsTypical Package Capacitance on Crystal Pins Thermal ImpedancesSoftware Development Tool SelectionDevelopment Kits Evaluation ToolsEmulation and Programming Accessories Accessories Emulation and ProgrammingDevice Programmers Third Party Tools Build a PSoC Emulator into Your BoardSawn QFN Ordering InformationOrdering Code Definitions Orig. Submission Description of Change Date Document HistoryUSB Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions

CY8C24123A specifications

The Cypress CY8C24123A is a prominent member of the PSoC (Programmable System-on-Chip) family, which integrates a microcontroller with programmable analog and digital components on a single chip. Designed for low-power applications, the CY8C24123A offers a compelling mix of features and technologies that make it a popular choice for embedded system developers.

One of the standout features of the CY8C24123A is its low power consumption, which allows it to extend battery life in portable applications. It operates at a voltage range of 1.71V to 5.5V, making it versatile for various power supply options. This device is equipped with a 24 MHz CPU that efficiently executes tasks while keeping energy usage minimal.

The chip boasts a rich set of programmable peripherals, including analog components such as operational amplifiers, comparators, and DACs, enabling designers to create custom signal processing pathways. These features are complemented by a variety of digital peripherals, like timers, UART, I2C, and SPI interfaces, which facilitate communication with other devices and microcontrollers. The integration of these components reduces the need for external components, leading to a more compact design and lower overall system costs.

Moreover, the CY8C24123A includes Flash memory (up to 2 KB) and SRAM (256 bytes), providing ample storage for application code and data. This Flash memory is reprogrammable, enabling developers to update their applications easily without needing to replace the chip.

Another defining characteristic of the CY8C24123A is its programmability. The device can be configured and programmed using the Cypress PSoC Designer software, which allows developers to design and simulate their applications in a user-friendly environment. The combination of hardware-based flexibility and software configuration provides a robust platform for creating custom solutions tailored to specific application requirements.

Overall, the Cypress CY8C24123A stands out for its balance of performance, programmability, and power efficiency. Its integration of programmable analog and digital blocks makes it suitable for a wide range of applications, including industrial control, consumer electronics, and automotive systems. The ability to customize the chip's functionality further boosts its appeal, making it an excellent choice for developers seeking a versatile and efficient solution for their embedded projects.
Top Page Image Contents