Cypress CY8C24123A manual Packaging Information, Packaging Dimensions

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CY8C24123A

CY8C24223A, CY8C24423A

Packaging Information

This section illustrates the packaging specifications for the CY8C24x23A PSoC device, along with the thermal impedances for each package and the typical package capacitance on crystal pins.

Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description of the emulation tools’ dimensions, refer to the document titled PSoC Emulator Pod Dimensions at http://www.cypress.com/design/MR10161.

Packaging Dimensions

Figure 23. 8-Pin (300-Mil) PDIP

0.380

0.390

41

PIN 1 ID

DIMENSIONS IN INCHES MIN.

MAX.

0.240

0.260

5

8

0.100 BSC.

SEATING

0.300

0.325

0.180 MAX.

0.115

0.145

PLANE

0.125

0.140

0.014

0.022

	0.015 MIN.	0.008
	0.015 MIN.	0.015
		0.015

0.055

0.070

0.430 MAX.

0°-10°

51-85075 *A

Document Number: 38-12028 Rev. *I

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Contents Features Logic Block DiagramCypress Semiconductor Corporation 198 Champion Court PSoC Functional Overview PSoC CoreDigital System Analog System Analog System Block DiagramGetting Started PSoC Device Characteristics PSoC PartAdditional System Resources Consultants Technical Support Application NotesPSoC Designer Software Subsystems Development ToolsDevice Editor Design BrowserHardware Tools Designing with User ModulesDevice Editor Application EditorAcronyms Used Document ConventionsUnits of Measure Numeric NamingPin Part Pinoutt Pinouts2PDIP 3SOICPin Definitions 20-Pin PDIP, SSOP, and Soic Pin Part PinoutSCL, ISSP-SCLK SDA, ISSP-SDATACY8C24423A 28-Pin PSoC Device Active High External Reset with InternalPin Definitions 32-Pin QFN Switch Mode Pump SMP ConnectionTo External Components required ExtclkNot for Production OCDOCD Cclk OCD HclkRegister Conventions Register ReferenceRegister Mapping Tables Abbreviations UsedRegister Map Bank 0 Table User Space Name Addr Access HexRegister Map Bank 1 Table Configuration Space ACB01CR2 Cpuf CPUSCR1 CPUSCR0 Units of Measure Symbol Unit of Measure Electrical SpecificationsAbsolute Maximum Ratings Symbol Description Min Typ Units Operating TemperatureOperating Temperature Symbol Description Min Typ Max Units Absolute Maximum RatingsDC Chip-Level Specifications DC Electrical CharacteristicsDC General Purpose IO Specifications Psrr OA DC Operational Amplifier SpecificationsAverage Input Offset Voltage Drift Low power comparator LPC reference Vdd Voltage range DC Low Power Comparator SpecificationsLPC supply current LPC voltage offset Document Number 38-12028 Rev. *IPsrr OB DC Analog Output Buffer SpecificationsDC Switch Mode Pump Specifications Switching Frequency MHz Switching Duty CycleOutput Voltage Ripple depends on Bandgap Voltage Reference Agnd = Vdd/2 DC Analog Reference SpecificationsAgnd = 2 x BandGap BG + Agnd = P24 P24 = Vdd/2 Agnd = 2 x BandGap Not Allowed Agnd = P24 P24 = Vdd/2CY8C24123A CY8C24223A, CY8C24423A DC POR, SMP, and LVD Specifications DC Analog PSoC Block SpecificationsDC Programming Specifications AC Electrical Characteristics AC Chip-Level SpecificationsDC24M CPU Frequency 2.7V Nominal MHz Refer to the AC Digital Block Nominal SpecificationsDC12M MHz Duty Cycle Jitter12M1P MHz Period Jitter IMOEnable Gain32K Select AC General Purpose IO Specifications Noise at 1 kHz Power = Medium, Opamp Bias = High AC Operational Amplifier SpecificationsBW OA NV/rt-HzCY8C24123A CY8C24223A, CY8C24423A Typical Agnd Noise with P24 Bypass AC Digital Block Specifications AC Low Power Comparator SpecificationsCrcprs SpimCRC PRSAC Analog Output Buffer Specifications Large Signal Bandwidth, 1V pp, 3dB BW, 100 pF LoadBW OB AC External Clock Specifications AC I2C Specifications AC Programming SpecificationsSetup Time for Stop Condition Bus Free Time Between a Stop and Start ConditionPulse Width of spikes are suppressed by Input filter Packaging Information Packaging DimensionsPin 150-Mil Soic Pin 210-Mil Ssop 51-85014 *D Pin 5x5 mm QFN Pin Sawn QFN Package Solder Reflow Peak Temperature Capacitance on Crystal PinsTypical Package Capacitance on Crystal Pins Thermal ImpedancesSoftware Development Tool SelectionDevelopment Kits Evaluation ToolsEmulation and Programming Accessories Accessories Emulation and ProgrammingDevice Programmers Third Party Tools Build a PSoC Emulator into Your BoardOrdering Information Ordering Code DefinitionsSawn QFN Orig. Submission Description of Change Date Document HistorySales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsUSB