Klark Teknik DN9344E, DN9340E specifications What is AES/EBU?

Application Notes

16.3. What is AES/EBU?

AES/EBU refers to the professional digital audio transmission system, jointly specified by the Audio Engineering Society (AES) and the European Broadcast Union (EBU), which allows the transmission of two channels down a shielded twisted pair cable using time division multiplexing (TDM) with one sample from each channel being transmitted within the sample period of the system. The system was published as the AES3 standard.

By virtue of TDM, one XLR cable carrying AES/EBU data can replace two regular analogue connections

-hence only single in/out connectors are required on the AES/EBU Unit. The clock for the data transmission, which is embedded in the incoming data using a process known as bi-phase mark encoding or Manchester encoding, can also be used as the clock source for the master clock within a unit equipped with an AES/EBU interface. This is the preferred mode of operation, as it guarantees that the unit is synchronised to the incoming data stream.

For large digital transmission systems using AES/EBU interfaces, such as those encountered in broadcast and studio installations, a clock signal operating at the sampling frequency can be distributed to all units separately to the AES/EBU signals. This is generally known as 'word clock' and allows all connected units to be synchronised on a sample-accurate basis. Word clock is most commonly connected using 75 Ohm, BNC connectors.

All DN9000E series Helix units feature sample rate converters (SRCs) on their AES/EBU inputs and, in the case of the DN9340E Helix Dual EQ and DN9344 Quad EQ, SRCs on their AES/EBU outputs as well. This allows the units to interface to AES/EBU systems operating up to 96kHz, including the Midas XL8 Live Performance System.

The SRCs may be bypassed in 44.1 kHz and 48 kHz AES/EBU synchronised transmission systems (48kHz only in the case of the DN9848E System Controller), which eliminates propagation delays introduced by the SRCs and reduces the input-to-output latency of the signal paths to that incurred by the actual digital signal processing algorithms.

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