4 - Language Dictionary
*OPC does not prevent processing of subsequent commands, but bit 0 will not be set until all pending operations are completed.
*OPC? causes the instrument to place an ASCII "1" in the Output Queue when all pending operations are completed. Unlike *OPC, *OPC? prevents processing of all subsequent commands. It is intended to be used at the end of a command line so that the application program can then monitor the bus for data until it receives the "1" from the dc source Output Queue.
Command Syntax | *OPC |
Parameters | None |
Query Syntax | *OPC? |
Returned Parameters | <NR1> 1 |
Related Commands | *OPC *TRIG *WAI |
*PSC
This command controls the automatic clearing at
*PSC ON 1
*PSC OFF 0
causes these registers to be cleared at
causes the contents of the Standard Event Enable and Service Request Enable registers to be saved in nonvolatile memory and recalled at
The query returns the current state of *PSC.
Command Syntax | *PSC <Bool> | |
Parameters | 0 1 OFF ON | |
Example | *PSC 0 | *PSC 1 |
Query Syntax | *PSC? |
|
Returned Parameters | <NR1>01 | |
Related Commands | *ESE | *SRE |
CAUTION: *PSC causes a write cycle to nonvolatile memory. Nonvolatile memory has a finite maximum number of write cycles. Programs that repeatedly cause write cycles to nonvolatile memory can eventually exceed the maximum number of write cycles and cause the memory to fail.
*SRE
This command sets the condition of the Service Request Enable Register. This register determines which bits from the Status Byte Register (see *STB for its bit configuration) are allowed to set the Master Status Summary (MSS) bit and the Request for Service (RQS) summary bit. A 1 in any Service Request Enable Register bit position enables the corresponding Status Byte Register bit and all such enabled bits then are logically ORed to cause Bit 6 of the Status Byte Register to be set.
When the controller conducts a serial poll in response to SRQ, the RQS bit is cleared, but the MSS bit is not. When *SRE is cleared (by programming it with 0), the dc source cannot generate an SRQ to the controller.
The query returns the current state of *SRE.
66