The Input Attenuation Register

zero (0) sets the impedance to 75. Setting bit 2 to one (1) sets the impedance of the inverting output to 50. Setting bit 2 to zero (0) sets the impedance to 75. At power-on, the impedance of both outputs is undefined.

Bit 1. Setting bit 1 to one (1) sets the ’Main’ output impedance to 0Ω. Setting bit 1 to zero (0) opens the 0path. The output attenuation must be set to 0 dB (bit 7) if the impedance is set to 0. Bit 5 must also be set to one (1) to get 0output impedance. At power-on, the ’Main’ output impedance is undefined.

Bit 0. Bit 0 is a reserved bit and must remain set to one (1). At power-on, the bit setting is undefined.

The Input Attenuation register controls the attenuation and impedance of the amplifier’s inputs (’Input 1’ and ’Input 2’).

Address

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input 1 attenuation and impedance

X

 

Input 2 attenuation and impedance

 

 

 

 

 

 

 

 

 

 

 

 

 

base + 0C16

16dB

8dB

4dB

2dB

1dB

75

50Ω

not

16dB

8dB

4dB

2dB

1dB

75

50Ω

relay

 

atten

atten

atten

atten

atten

in

in

used

atten

atten

atten

atten

atten

in

in

act.

 

 

 

 

 

 

imp

imp

 

 

 

 

 

 

imp

imp

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bits 15 - 11. Bits 15 - 11 set the ’Input 1’ attenuation from 0dB to 31dB. Z eros (0) in bits 15 - 11 set 0dB attenuation. Ones (1) in bits 15 - 11 set up to 31dB of attenuation. At power-on, the input attenuation is undefined.

Bits 10 - 9. Bits 10 - 9 set the input impedance of ’Input 1’. Setting bit 10 to one (1) sets the impedance to 75. Setting bit 9 to one (1) sets the impedance to 50. If both bits are set to one (1), the impedance is 50. Setting both bits to zero (0) sets the input impedance to 1 M. At power-on, the input impedance is undefined.

Bits 7 - 3. Bits 7 - 3 set the ’Input 2’ attenuation from 0dB to 31dB.

Z eros (0) in bits 7 - 3 set 0dB attenuation. Ones (1) in bits 7 - 3 set up to 31dB of attenuation. At power-on, the input attenuation is undefined.

Bits 2 - 1. Bits 2 - 1 set the input impedance of ’Input 2’. Setting bit 2 to one (1) sets the impedance to 75. Setting bit 1 to one (1) sets the impedance to 50. If both bits are set to one (1), the impedance is 50. Setting both bits to zero (0) sets the input impedance to 1 M. At power-on, the input impedance is undefined.

C-10 Register-Based Programming

Register Descriptions

Page 135
Image 135
Agilent Technologies E1446A user manual Input Attenuation Register, Base + 0C16

E1446A specifications

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