Thermal Performance, Thermal Parameters | Analog Devices AD9912

			AD9912

THERMAL PERFORMANCE
Table 7. Thermal Parameters
Symbol	Thermal Characteristic Using a JEDEC51-7 Plus JEDEC51-5 2S2P Test Board	Value		Unit
θJA	Junction-to-ambient thermal resistance, 0.0 m/sec air flow per JEDEC JESD51-2 (still air)	25.2		°C/W
θJMA	Junction-to-ambient thermal resistance, 1.0 m/sec air flow per JEDEC JESD51-6 (moving air)	22.0		°C/W
θJMA	Junction-to-ambient thermal resistance, 2.0 m/sec air flow per JEDEC JESD51-6 (moving air)	19.8		°C/W
θJB	Junction-to-board thermal resistance, 1.0 m/sec air flow per JEDEC JESD51-8 (moving air)	13.9		°C/W
θJC	Junction-to-case thermal resistance (die-to-heat sink) per MIL-Std 883, Method 1012.1	1.7		°C/W
ΨJT	Junction-to-top-of-package characterization parameter, 0 m/sec air flow per JEDEC JESD51-2 (still air)	0.1		°C/W

The AD9912 is specified for a case temperature (TCASE). To ensure that TCASE is not exceeded, an airflow source can be used.

Use the following equation to determine the junction tempera- ture on the application PCB:

TJ = TCASE + (ΨJT × PD)

where:

TJ is the junction temperature (°C).

TCASE is the case temperature (°C) measured by customer at top center of package.

ΨJT is the value from Table 7.

PD is the power dissipation (see the Total Power Dissipation section in the Specifications section).

Values of θJA are provided for package comparison and PCB design considerations. θJA can be used for a first-order approximation of TJ by the equation

TJ = TA + (θJA × PD)

where TA is the ambient temperature (°C).

Values of θJC are provided for package comparison and PCB design considerations when an external heat sink is required.

Values of θJB are provided for package comparison and PCB design considerations.

The values in Table 7 apply to both 64-lead package options.

Rev. D Page 23 of 40

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Analog Devices AD9912 specifications Thermal Performance, Thermal Parameters

Contents

General Description FeaturesBasic Block Diagram Applications Table of Contents Parameter Min Typ Max Unit Test Conditions/Comments SpecificationsDC Specifications Clock Output Drivers Total Power DissipationSystem Clock Input Parameter Min Typ Max Unit Test Conditions/Comments AC Specifications Avss − Parameter Rating Absolute Maximum RatingsThermal Resistance ESD Caution Input Pin No Output Pin Type Mnemonic Description PIN Configuration and Function Descriptions Outb ResetIoupdate GND Avss Video BW Typical Performance Characteristics Absolute Phase Noise Using Hstl Driver DDS Run at 200 Msps for 10 MHz Plot Absolute Phase Noise of Unfiltered DAC Output, fOUT = 63 MHz Cmos Output Driver Waveform @ 3.3 INPUT/OUTPUT Termination Recommendations Direct Digital Synthesizer DDS Theory of OperationOverview 1024  DIGITAL-TO-ANALOG DAC OutputReconstruction Filter Solving this equation for FTW yields DAC Spectrum vs. Reconstruction Filter Response Fdbkin Inputs Sysclk PLL Doubler Sysclk InputsFunctional Description External Loop Filter Sysclk PLL Sysclk PLL MultiplierSysclk PLL multiplier has a 1 GHz VCO at its core Detail of Sysclk Differential Inputs Harmonic Spur Reduction Output Clock Drivers and 2× Frequency Multiplier Spur Reduction Circuit Diagram Thermal Parameters Thermal Performance Default Output Frequency on POWER-UP POWER-UPPOWER-ON Reset Supplies Power Supply Partitioning Operation of Serial Control Port Serial Control PortSerial Control Port PIN Descriptions Operations are changed to LSB first order MSB/LSB First TransfersInstruction Word 16 Bits Read I15 I14 I13 I12 I11 I10 A12 A11 A10 Serial Control Port, 16-Bit Instruction Word, MSB First Parameter Description PLL Register MAP HSR-A Register Descriptions Register 0x0000-Serial Port ConfigurationRegister 0x0010-Power-Down and Enable Power-up default is defined by the start-up pins Register 0x0021-Reserved Register 0x0022-PLL Parameters Register 0x0011-Reserved Register 0x0012-Reset AutoclearingRegister 0x0013-Reset Not Autoclearing Register 0x0020-N-Divider Register 0x0106-S-Divider Register 0x01A7-FTW0 Frequency Tuning WordRegister 0x01A8-FTW0 Frequency Tuning Word Register 0x0105-S-Divider Register 0x01AC-Phase Register 0x01A9-FTW0 Frequency Tuning WordRegister 0x01AA-FTW0 Frequency Tuning Word Register 0x01AB-FTW0 Frequency Tuning Word Register 0x040D to Register 0x0410-Reserved Register 0x0200-HSTL DriverRegister 0x0201-CMOS Driver Register 0x040C-DAC Full-Scale Current Register 0x0506-Spur B Register 0x0503-Spur aRegister 0x0504-Spur a Register 0x0505-Spur B Outline Dimensions AD9912BCPZ-REEL71 Model Temperature Range Package Description Package OptionOrdering Guide AD9912BCPZ1 Rev. D Page 40