Compaq 850 LIST OF FIGURES

Technical Reference Guide
Compaq Deskpro EXS and Workstation 300 Personal Computers
Featuring the Intel Pentium 4 Processor
First Edition –- December 2000
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LIST OF FIGURES
FIGURE 2–1. COMPAQ DESKPRO PERSONAL COMPUTERS WITH MONITORS................................................ 2-1
FIGURE 2–2. FRONT CABINET VIEWS ......................................................................................................... 2-4
FIGURE 2–3. REAR CABINET VIEW .............................................................................................................2-5
FIGURE 2–4. CHASSIS LAYOUT, LEFT SIDE VIEW ....................................................................................... 2-6
FIGURE 2–5. SYSTEM BOARD LAYOUT...................................................................................................... 2-7
FIGURE 2–6. SYSTEM ARCHITECTURE, BLOCK DIAGRAM ............................................................................2-9
FIGURE 2–7. PROCESSOR ASSEMBLY AND MOUNTING............................................................................. 2-10
FIGURE 3–1. PROCESSOR/MEMORY SUBSYSTEM ARCHITECTURE.............................................................. 3-1
FIGURE 3–2. PENTIUM 4 PROCESSOR INTERNAL ARCHITECTURE............................................................... 3-3
FIGURE 3–3. SDRAM/RDRAM BANDWIDTH COMPARISON...................................................................... 3-5
FIGURE 3–4. RAMBUS CHANNEL SIGNAL DISTRIBUTION AND KEY ATTRIBUTES ........................................ 3-6
FIGURE 3–5. RAMBUS TRANSACTIONS (SINGLE CHANNEL)........................................................................3-7
FIGURE 3–6. SYSTEM MEMORY MAP ......................................................................................................... 3-9
FIGURE 4-1. PCI BUS DEVICES AND FUNCTIONS......................................................................................... 4-2
FIGURE 4-2. CONFIGURATION CYCLE......................................................................................................... 4-4
FIGURE 4-3. PCI CONFIGURATION SPACE MAPPING................................................................................... 4-5
FIGURE 4-4. PCI BUS CONNECTOR (32-BIT TYPE) ..................................................................................... 4-9
FIGURE 4-5. AGP 1X DATA TRANSFER (PEAK TRANSFER RATE: 266 MB/S).......................................... 4-11
FIGURE 4-6. AGP 2X DATA TRANSFER (PEAK TRANSFER RATE: 532 MB/S).......................................... 4-12
FIGURE 4-7. AGP 4X DATA TRANSFER (PEAK TRANSFER RATE: 1064 MB/S)........................................ 4-12
FIGURE 4-8. 1.5-VOLT AGP BUS CONNECTOR......................................................................................... 4-14
FIGURE 4-9. MASKABLE INTERRUPT PROCESSING, BLOCK DIAGRAM ...................................................... 4-15
FIGURE 4-10. CONFIGURATION MEMORY MAP......................................................................................... 4-20
FIGURE 4-11. FAN CONTROL BLOCK DIAGRAM .........................................................................................4-34
FIGURE 5-1. 40-PIN PRIMARY IDE CONNECTOR (ON SYSTEM BOARD). ...................................................... 5-3
FIGURE 5-2. 34-PIN DISKETTE DRIVE CONNECTOR..................................................................................... 5-7
FIGURE 5-3. SERIAL INTERFACE CONNECTOR (MALE DB-9 AS VIEWED FROM REAR OF CHASSIS)...............5-8
FIGURE 5-4. PARALLEL INTERFACE CONNECTOR (FEMALE DB-25 AS VIEWED FROM REAR OF CHASSIS)..5-15
FIGURE 5-5. KEYBOARD OR POINTING DEVICE INTERFACE CONNECTOR.................................................. 5-21
FIGURE 5-6. USB I/F, BLOCK DIAGRAM ...................................................................................................5-22
FIGURE 5-7. USB PACKET FORMATS ........................................................................................................5-23
FIGURE 5-8. UNIVERSAL SERIAL BUS CONNECTOR................................................................................... 5-25
FIGURE 5-9. AUDIO SUBSYSTEM FUNCTIONAL BLOCK DIAGRAM ............................................................. 5-27
FIGURE 5-10. AC’97 LINK BUS PROTOCOL .............................................................................................. 5-29
FIGURE 5-11. CS4297A AUDIO CODEC FUNCTIONAL BLOCK DIAGRAM................................................... 5-30
FIGURE 5-12. AOL IMPLEMENTATION (GENERIC REPRESENTATION)....................................................... 5-34
FIGURE 5-13. REMOTE SENSE ALERT IMPLEMENTATION (GENERIC REPRESENTATION)............................5-35
FIGURE 5-14. RSA LOGIC, BLOCK DIAGRAM ........................................................................................... 5-35
FIGURE 6–1. POWER DISTRIBU TION AND CONTROL, BLOCK DIAGRAM....................................................... 6-1
FIGURE 6–2. POWER CABLE DIAGRAM .......................................................................................................6-5
FIGURE 6–3. LOW VOLTAGE SUPPLY AND DISTRIBU TION DIAGRAM........................................................... 6-6
FIGURE 6–4. SIGNAL DISTR IBUTION DIAGRAM, TYPICAL CONFIGURATION................................................ 6-7
FIGURE 6–5. HEADER PINOUTS .................................................................................................................. 6-8
FIGURE B–1. ASCII CHARACTER SET........................................................................................................B-1