Cypress CY4672 manual Code Performance Analysis

Keyboard

The interrupt latency includes two portions. The first portion is the time between the assertion of an enabled interrupt and the start of its ISR, which can be calculated using the following equation:

Latency1 = Time for current instruction to finish +

Time for M8C to change program counter to interrupt address + Time for LJMP instruction in interrupt table to execute.

For example, if the 5-cycle JMP instruction is executing when an interrupt becomes active, the total number of CPU clock cycles before the ISR begins are as follows:

(1 to 5 cycles for JMP to finish) + (13 cycles for interrupt routine) +

(7 cycles for LJMP) = 21 to 25 cycles.

In the example above, at 12 MHz, 25 clock cycles take 2.083 µs.

The second portion is the time between the start of the ISR and the set of the flag. For example, the row port interrupt (caused by pressing any key) takes 19 CPU clock cycles for this portion. There- fore, the Latency2 equals to 1.583 µs for the 12 MHz CPU.

Consequently, the total latency for a button interrupt is Latency1 + Latency2 = 3.667 µs

4.3.12Code Performance Analysis

A key press report is used to analyze the code performance. A typical key press report contains the following steps:

■A key press interrupts the MCU. The prior section has calculated that it takes 3.667 µs for MCU to responds to this Interrupt.

■MCU exits the sleep state, scans the Bind button and turns on the timer. It takes 40.8 µs.

■MCU calls function scan_keyboard() to detect which key is pressed. This function consumes 1.15 ms.

■MCU calls function generate_standard_report() to format the report and send the report to the bridge. This step takes 2.01 ms, which includes 1.66 ms radio transmission time.

As a result, it takes 3.20 ms for the keyboard to report a key press to the bridge.

CY4672 Reference Design Guide, Document # 001-16968 Revision ** 71

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