CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)

The ESIF is the serial interface (1), the ESIFS is the serial interface (2) enable registers and P10–P13, P30– P33 terminals become serial input/output terminals (SIN, SOUT, SCLK, SRDY) when "1" is written, and they become I/O port terminals when "0" is written.

Also, see Table 4.11.3.2 for the terminal settings according to the transfer modes. At initial reset, this register is set to "0".

Note: After setting ESIF to "1", wait at least 10 µsec before starting actual data transfer since a hazard may be generated from the P12 (SCLK) terminal when ESIF is set to "1".

Also, setting ESIFS to "1" may cause a hazard to be generated from the P32 (SCLK) terminal, so a 10 µsec or more interval is also needed here.

PUL10: Serial interface (1) SIN pull-up control register (FF45H•D0)PUL12: Serial interface (1) SCLK pull-up control register (FF45H•D2)PUL30: Serial interface (2) SIN pull-up control register (FF4DH•D0)PUL32: Serial interface (2) SCLK pull-up control register (FF4DH•D2)

Sets the pull-up of the SIN terminal and the SCLK terminals (in the slave mode).

When "1" is written: Pull-up ON

When "0" is written: Pull-up OFF

Reading: Valid

Sets the pull-up resistor built into the SIN (P10/P30) and SCLK (P12/P32) terminals to ON or OFF. (Pull- up resistor is only built in the port selected by mask option.)

SCLK pull-up is effective only in the slave mode. In the master mode, the PUL12/PUL32 register can be used as a general purpose register.

At initial reset, these registers are set to "1" and the lines are pulled up.

SMD0, SMD1: Serial interface (1) mode selection register (FF70H•D1, D2)SMD0S, SMD1S: Serial interface (2) mode selection register (FF58H•D1, D2)

Set the transfer modes as shown in Table 4.11.9.2.

Table 4.11.9.2 Transfer mode settings

SMD1/SMD1S

SMD0/SMD0S

Mode

1

1

8-bit asynchronous

1

0

7-bit asynchronous

0

1

Clock synchronous slave

0

0

Clock synchronous master

This register can also read out.

At initial reset, this register is set to "0".

SCS0, SCS1: Serial interface (1) clock source selection register (FF71H•D0, D1)

SCS0S, SCS1S: Serial interface (2) clock source selection register (FF59H•D0, D1)

Select the clock source as shown in Table 4.11.9.3.

Table 4.11.9.3

Clock source selection

 

 

 

 

SCS1

SCS0

 

Clock source

1

1

 

Programmable timer

1

0

 

fOSC3 / 93

(2400 bps)

0

1

 

fOSC3 / 372

(600 bps)

0

0

 

fOSC3 / 186

(1200 bps)

This register can also be read out.

In the clock synchronous slave mode, setting of this register is invalid.

At initial reset, this register is set to "0".

94

EPSON

S1C63558 TECHNICAL MANUAL