Epson S1C63558 4.6.6 I/O memory of I/O ports, Not set in the circuit, Initial value at initial reset, *3 Constantly "0" when being read

CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (I/O Ports)

4.6.6 I/O memory of I/O ports

Tables 4.6.6.1(a) and (b) show the I/O addresses and the control bits for the I/O ports.

Table 4.6.6.1(a) Control bits of I/O ports

Address		Register									Comment
	D3	D2	D1	D0	Name	Init ∗1	1	0
	IOC03	IOC02	IOC01	IOC00	IOC03	0	Output	Input
					IOC02	0	Output	Input
FF40H										P00–P03 I/O control register
		R/W			IOC01	0	Output	Input
					IOC00	0	Output	Input
	PUL03	PUL02	PUL01	PUL00	PUL03	1	On	Off
					PUL02	1	On	Off
FF41H										P00–P03 pull-up control register
		R/W			PUL01	1	On	Off
					PUL00	1	On	Off
	P03	P02	P01	P00	P03	– ∗2	High	Low
					P02	– ∗2	High	Low
FF42H										P00–P03 I/O port data
		R/W			P01	– ∗2	High	Low
					P00	– ∗2	High	Low
					IOC13	0	Output	Input	P13		I/O control register
	IOC13	IOC12	IOC11	IOC10					General-purpose register when SIF (clock sync. slave) is selected
					IOC12	0	Output	Input	P12		I/O control register
FF44H									General-purpose register when SIF (clock sync.) is selected
					IOC11	0	Output	Input	P11		I/O control register (ESIF=0)
		R/W							General-purpose register when SIF is selected
					IOC10	0	Output	Input	P10		I/O control register (ESIF=0)
									General-purpose register when SIF is selected
					PUL13	1	On	Off	P13 pull-up control register
									General-purpose register when SIF (clock sync. slave) is selected
	PUL13	PUL12	PUL11	PUL10	PUL12	1	On	Off	P12 pull-up control register
									General-purpose register when SIF (clock sync. master) is selected
FF45H									SCLK (I) pull-up control register
										when SIF (clock sync. slave) is selected
					PUL11	1	On	Off	P11 pull-up control register (ESIF=0)
		R/W							General-purpose register when SIF is selected
					PUL10	1	On	Off	P10 pull-up control register (ESIF=0)
									SIN pull-up control register when SIF is selected
					P13	– ∗2	High	Low	P13		I/O port data
	P13	P12	P11	P10					General-purpose register when SIF (clock sync. slave) is selected
	(XSRDY)	(XSCLK)	(SOUT)	(SIN)	P12	– ∗2	High	Low	P12		I/O port data
FF46H									General-purpose register when SIF (clock sync.) is selected
					P11	– ∗2	High	Low	P11		I/O port data (ESIF=0)
		R/W							General-purpose register when SIF is selected
					P10	– ∗2	High	Low	P10		I/O port data (ESIF=0)
									General-purpose register when SIF is selected
					IOC23	0	Output	Input	P23		I/O control register (EXLCDC=0)
	IOC23	IOC22	IOC21	IOC20					General-purpose register when FR output is selected
FF48H					IOC22	0	Output	Input	P22		I/O control register (EXLCDC=0)
									General-purpose register when CL output is selected
		R/W			IOC21	0	Output	Input	P21		I/O control register
					IOC20	0	Output	Input	P20		I/O control register
					PUL23	1	On	Off	P23 pull-up control register (EXLCDC=0)
	PUL23	PUL22	PUL21	PUL20					General-purpose register when FR output is selected
FF49H					PUL22	1	On	Off	P22 pull-up control register (EXLCDC=0)
									General-purpose register when CL output is selected
		R/W			PUL21	1	On	Off	P21 pull-up control register
					PUL20	1	On	Off	P20 pull-up control register
	P23	P22			P23	– ∗2	High	Low	P23		I/O port data (EXLCDC=0)
			P21	P20					General-purpose register when FR output is selected
	(FR)	(CL)
					P22	– ∗2	High	Low	P22		I/O port data (EXLCDC=0)
FF4AH
									General-purpose register when CL output is selected
		R/W			P21	– ∗2	High	Low	P21		I/O port data
					P20	– ∗2	High	Low	P20		I/O port data

*1	Initial value at initial reset	*3 Constantly "0" when being read
*2	Not set in the circuit
44		EPSON	S1C63558 TECHNICAL MANUAL