CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)

4.11.4 Clock source

There are four clock sources and selection is made by setting the two bits of the clock source selection register SCS0 and SCS1 as shown in table below.

 

Table 4.11.4.1

Clock source

 

 

 

 

 

SCS1

 

SCS0

 

Clock source

1

 

1

 

Programmable timer

1

 

0

 

fOSC3 / 93

(2400 bps)

0

 

1

 

fOSC3 / 372

(600 bps)

0

 

0

 

fOSC3 / 186

(1200 bps)

This register setting is invalid in clock synchronous slave mode and the external clock input from the SCLK terminal is used.

When the "programmable timer" is selected, the programmable timer 1 underflow signal is divided by 1/ 2 and this signal used as the clock source. With respect to the transfer rate setting, see "4.10 Programmable Timer". At initial reset, the synchronous clock is set to "fOSC3/186".

Whichever clock is selected, the signal is further divided by 1/16 and then used as the synchronous clock. Furthermore, external clock input is used as is for SCLK in clock synchronous slave mode.

 

 

 

 

 

 

 

1/93

 

 

 

 

 

 

 

 

 

 

 

 

OSC3

fOSC3

 

 

 

 

 

 

 

 

 

 

 

 

 

Synchro-

 

 

 

 

 

1/372

 

 

 

 

 

 

 

 

 

oscillation

 

Divider

 

 

 

 

Selector

 

1/16

 

 

 

Selector

 

nous clock

 

 

 

 

 

 

 

 

 

 

circuit

 

 

 

 

 

1/186

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Programmable timer 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1/2

 

 

 

 

 

 

 

 

 

 

 

 

underflow signal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Clock synchronous slave mode)

SCLK

Fig. 4.11.4.1 Division of the synchronous clock

Table 4.11.4.2 shows an examples of transfer rates and OSC3 oscillation frequencies when the clock source is set to programmable timer.

Table 4.11.4.2 OSC3 oscillation frequencies and transfer rates

Transfer rate

fOSC3 = 3.580 MHz

(bps)

PSC1X

RLD1X

9,600

0 (1/1)

0CH

4,800

0 (1/1)

17H

2,400

0 (1/1)

2FH

1,200

0 (1/1)

5DH

600

0 (1/1)

BAH

300

1 (1/4)

5DH

150

1 (1/4)

BAH

When the demultiplied signal of the OSC3 oscillation circuit is made the clock source, it is necessary to turn the OSC3 oscillation ON, prior to using the serial interface.

A time interval of several msec to several 10 msec, from the turning ON of the OSC3 oscillation circuit to until the oscillation stabilizes, is necessary, due to the oscillation element that is used. Consequently, you should allow an adequate waiting time after turning ON of the OSC3 oscillation, before starting transmit- ting/receiving of serial interface. (The oscillation start time will vary somewhat depending on the oscillator and on the externally attached parts. Refer to the oscillation start time example indicated in Chapter 7, "Electrical Characteristics".)

At initial reset, the OSC3 oscillation circuit is set to OFF status.

80

EPSON

S1C63558 TECHNICAL MANUAL