CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Memory Map)

Table 4.1.1 (c) I/O memory map (FF44H–FF4DH)

 

Address

 

Register

 

 

 

 

 

 

 

 

Comment

 

 

D3

D2

D1

D0

Name

Init 1

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOC13

0

Output

Input

 

P13

I/O control register

 

 

 

IOC13

IOC12

IOC11

IOC10

 

 

 

 

 

General-purpose register when SIF (clock sync. slave) is selected

 

 

 

IOC12

0

Output

Input

 

P12

I/O control register

 

 

 

 

 

 

 

 

 

 

FF44H

 

 

 

 

 

 

 

 

 

General-purpose register when SIF (clock sync.) is selected

 

 

 

 

 

 

IOC11

0

Output

Input

 

P11

I/O control register (ESIF=0)

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

 

 

 

 

 

General-purpose register when SIF is selected

 

 

 

 

 

IOC10

0

Output

Input

 

P10

I/O control register (ESIF=0)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

General-purpose register when SIF is selected

 

 

 

 

 

 

 

PUL13

1

On

Off

 

P13 pull-up control register

 

 

 

 

 

 

 

 

 

 

 

 

General-purpose register when SIF (clock sync. slave) is selected

 

 

 

PUL13

PUL12

PUL11

PUL10

PUL12

1

On

Off

 

P12 pull-up control register

 

 

 

 

 

 

 

 

 

 

 

 

General-purpose register when SIF (clock sync. master) is selected

 

 

 

 

 

 

 

 

 

 

 

 

 

(I) pull-up control register

 

 

FF45H

 

 

 

 

 

 

 

 

 

SCLK

 

 

 

 

 

 

 

 

 

 

 

when SIF (clock sync. slave) is selected

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PUL11

1

On

Off

 

P11 pull-up control register (ESIF=0)

 

 

 

 

R/W

 

 

 

 

 

 

General-purpose register when SIF is selected

 

 

 

 

 

 

 

PUL10

1

On

Off

 

P10 pull-up control register (ESIF=0)

 

 

 

 

 

 

 

 

 

 

 

 

SIN pull-up control register when SIF is selected

 

 

 

 

 

 

 

P13

2

High

Low

 

P13

I/O port data

 

 

 

P13

P12

P11

P10

 

 

 

 

 

General-purpose register when SIF (clock sync. slave) is selected

 

 

 

(XSRDY)

(XSCLK)

(SOUT)

(SIN)

P12

2

High

Low

 

P12

I/O port data

 

 

FF46H

 

 

 

 

 

 

 

 

 

General-purpose register when SIF (clock sync.) is selected

 

 

 

 

 

 

P11

2

High

Low

 

P11

I/O port data (ESIF=0)

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

 

 

 

 

 

General-purpose register when SIF is selected

 

 

 

 

 

P10

2

High

Low

 

P10

I/O port data (ESIF=0)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

General-purpose register when SIF is selected

 

 

 

 

 

 

 

IOC23

0

Output

Input

 

P23

I/O control register (EXLCDC=0)

 

 

 

IOC23

IOC22

IOC21

IOC20

 

 

 

 

 

General-purpose register when FR output is selected

 

 

FF48H

 

 

 

 

IOC22

0

Output

Input

 

P22

I/O control register (EXLCDC=0)

 

 

 

 

 

 

 

 

 

 

 

General-purpose register when CL output is selected

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

IOC21

0

Output

Input

 

P21

I/O control register

 

 

 

 

 

 

 

IOC20

0

Output

Input

 

P20

I/O control register

 

 

 

 

 

 

 

PUL23

1

On

Off

 

P23 pull-up control register (EXLCDC=0)

 

 

 

PUL23

PUL22

PUL21

PUL20

 

 

 

 

 

General-purpose register when FR output is selected

 

 

FF49H

 

 

 

 

PUL22

1

On

Off

 

P22 pull-up control register (EXLCDC=0)

 

 

 

 

 

 

 

 

 

 

 

General-purpose register when CL output is selected

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

PUL21

1

On

Off

 

P21 pull-up control register

 

 

 

 

 

 

 

PUL20

1

On

Off

 

P20 pull-up control register

 

 

 

P23

P22

 

 

P23

2

High

Low

 

P23

I/O port data (EXLCDC=0)

 

 

 

P21

P20

 

 

 

 

 

General-purpose register when FR output is selected

 

 

 

(FR)

(CL)

 

 

 

 

 

 

 

 

 

 

P22

2

High

Low

 

P22

I/O port data (EXLCDC=0)

 

 

FF4AH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

General-purpose register when CL output is selected

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

P21

2

High

Low

 

P21

I/O port data

 

 

 

 

 

 

 

P20

2

High

Low

 

P20

I/O port data

 

 

 

 

 

 

 

IOC33

0

Output

Input

 

P33

I/O control register

 

 

 

IOC33

IOC32

IOC31

IOC30

 

 

 

 

 

General-purpose register when SIF (clock sync. slave) is selected

 

 

 

IOC32

0

Output

Input

 

P32

I/O control register

 

 

 

 

 

 

 

 

 

 

FF4CH

 

 

 

 

 

 

 

 

 

General-purpose register when SIF (clock sync.) is selected

 

 

 

 

 

 

IOC31

0

Output

Input

 

P31

I/O control register (ESIFS=0)

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

 

 

 

 

 

General-purpose register when SIF is selected

 

 

 

 

 

IOC30

0

Output

Input

 

P30

I/O control register (ESIFS=0)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

General-purpose register when SIF is selected

 

 

 

 

 

 

 

PUL33

1

On

Off

 

P33 pull-up control register

 

 

 

 

 

 

 

 

 

 

 

 

General-purpose register when SIF (clock sync. slave) is selected

 

 

 

PUL33

PUL32

PUL31

PUL30

PUL32

1

On

Off

 

P32 pull-up control register

 

 

 

 

 

 

 

 

 

 

 

 

General-purpose register when SIF (clock sync. master) is selected

 

 

FF4DH

 

 

 

 

 

 

 

 

 

SCLK (I) pull-up control register

 

 

 

 

 

 

 

 

 

 

 

when SIF (clock sync. slave) is selected

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PUL31

1

On

Off

 

P31 pull-up control register (ESIFS=0)

 

 

 

 

R/W

 

 

 

 

 

 

General-purpose register when SIF is selected

 

 

 

 

 

 

 

PUL30

1

On

Off

 

P30 pull-up control register (ESIFS=0)

 

 

 

 

 

 

 

 

 

 

 

 

SIN pull-up control register when SIF is selected

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

S1C63558 TECHNICAL MANUAL

EPSON

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