CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT)

4.16 Interrupt and HALT

<Interrupt types>

The S1C63558 provides the following interrupt functions.

External interrupt: • Input interrupt

(2 systems)

Internal interrupt: • Watchdog timer interrupt

(NMI, 1 system)

• Programmable timer interrupt

(2 systems)

• Serial interface interrupt

(6 systems)

• Timer interrupt

(4 systems)

• Stopwatch timer interrupt

(2 systems)

• Dialing interrupt

(1 system)

• FSK interrupt

(2 systems)

To authorize interrupt, the interrupt flag must be set to "1" (EI) and the necessary related interrupt mask registers must be set to "1" (enable).

When an interrupt occurs the interrupt flag is automatically reset to "0" (DI), and interrupts after that are inhibited.

The watchdog timer interrupt is an NMI (non-maskable interrupt), therefore, the interrupt is generated regardless of the interrupt flag setting. Also the interrupt mask register is not provided. However, it is possible to not generate NMI since software can stop the watchdog timer operation.

Figure 4.16.1 shows the configuration of the interrupt circuit.

Note: After an initial reset, all the interrupts including NMI are masked until both the stack pointers SP1 and SP2 are set with the software. Be sure to set the SP1 and SP2 in the initialize routine. Further, when re-setting the stack pointer, the SP1 and SP2 must be set as a pair. When one of them is set, all the interrupts including NMI are masked and interrupts cannot be accepted until the other one is set.

<HALT>

The S1C63558 has HALT functions that considerably reduce the current consumption when it is not necessary.

The CPU enters HALT status when the HALT instruction is executed.

In HALT status, the operation of the CPU is stopped. However, timers continue counting since the oscillation circuit operates. Reactivating the CPU from HALT status is done by generating a hardware interrupt request including NMI.

S1C63558 TECHNICAL MANUAL

EPSON

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