Epson S1C63558 4.15.3 Ring/carrier detection and interrupt, RDET/CDET bit, 00 (Initial value), Comparison register, Ring detection interrupt generation

CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (FSK Demodulator)

4.15.3 Ring/carrier detection and interrupt

The FSK block has a ring detection circuit and a carrier detection circuit built-in.

When a ring signal is input, the ring detection circuit sets the RDET bit (FF66H•D1) to "1" while the signal is being input. In the same way, when a carrier is input, the carrier detection circuit sets the CDET bit (FF66H•D0) to "1". Further, the interrupt can be generated at the rising edge or falling edge of these detection signals. The edge selection can be made by the RDET comparison register RDETCP (FF67H•D1) and CDET comparison register CDETCP (FF67H•D0).

When the register is set to "0", the interrupt is generated at the rising edge. When set to "1", the interrupt is generated at the falling edge.

When the interrupt condition is met, the corresponding interrupt factor flag (the ring detection interrupt

=IRDET, the carrier detection interrupt = ICDET) is set to "1". In this case, when the corresponding interrupt mask register (the ring detection interrupt = EIRDET, the carrier detection interrupt = EICDET) has been set to "1", an interrupt request is generated to the CPU. When the interrupt mask register is set to "0", the interrupt will be masked. However, even in this case, the interrupt factor flag is set to "1" when the interrupt condition is met.

Figure 4.15.3.1 shows the relationship between the detection bit and the comparison register.

Comparison register

RDETCP	CDETCP
0	0

With the above setting, the ring detection/carrier detection interrupt is generated under the following conditions:

RDET/CDET bit

(1)RDET CDET

00 (Initial value)

(2)RDET CDET

1 0 Ring detection interrupt generation

The interrupt is generated when the contents of RDET are unmatched with the comparison register RDETCP.

By copying the RDET bit to the RDETCP register, the ring detection interrupt changes its generation timing to the falling edge.

RDETCP	CDETCP
1	0

(3)RDET CDET

0 0 Ring detection interrupt generation

The interrupt is generated at the falling edge.

Reset RDETCP and CDETCP in the initial status.

RDETCP	CDETCP
0	0

(4)RDET CDET

0 1 Carrier interrupt generation

The interrupt is generated when the contents of CDET are unmatched with the comparison register CDETCP.

By copying the CDET bit to the CDETCP register, the carrier detection interrupt changes its generation timing to the falling edge.

RDETCP	CDETCP
0	1

(5)RDET CDET

0 0 Carrier detection interrupt generation

The interrupt is generated at the falling edge.

Fig. 4.15.3.1 Relationship between the detection bit and the comparison register

S1C63558 TECHNICAL MANUAL EPSON 139