CHAPTER 5: SUMMARY OF NOTES

Sound generator

(1)Since the BZ and XBZ signals are generated asynchronous to the BZE register, hazards may be pro- duced when the signal goes ON/OFF due to the setting of the BZE register.

(2)The one-shot output is only valid when the normal buzzer output is OFF (BZE = "0") and will be invalid when the normal buzzer output is ON (BZE = "1").

(3)Since the BZ and XBZ signals are the special outputs of the R01 and R00 ports, it is necessary to set the high impedance control registers (R01HIZ, R00HIZ) to "0", the data registers (R01, R00) to "1" and the output selection registers (BZOUT, XBZOUT) to "1" before setting the BZE register to "1".

SVD circuit

(1)To obtain a stable detection result, the SVD circuit must be ON for at least l00 µsec. So, to obtain the SVD detection result, follow the programming sequence below.

1.

Set SVDON to "1"

3.

Set SVDON to "0"

2.

Maintain for 100 µsec minimum

4.

Read SVDDT

(2) The SVD circuit should normally be turned OFF because SVD operation increase current consumption.

Telephone function

(1)It is necessary to turn the OSC3 oscillation on prior to a dialing operation in tone mode because the tone mode uses the OSC3 (3.58 MHz) clock. However it increases current consumption. Therefore, turn the OSC3 oscillation off after finishing the dialling operation in tone mode.

(2)Do not write "0" (0000B) to the IDP, FTS, PTS or TCD (in pulse mode) registers because it may cause a malfunction.

(3)The pause function control bit PAUSE (FF14H•D1) and the flash function control bit FLASH (FF14H•D0) are write-only, so software cannot control these functions (on address FF14H) using an ALU instruction (AND, OR ...). Furthermore, be aware that the pause function or the flash function is canceled when "0" is written to the PAUSE bit (FF14H•D1) or the FLASH bit (FF14H•D0).

FSK demodulator

(1)When starting the FSK demodulator operation, the OSC3 oscillation circuit must be turned ON and the CPU operating clock must be switched to the OSC3 clock.

The OSC3 oscillation circuit takes a maximum 5 msec for oscillation stabilization after turning the circuit ON. Consequently, allow an adequate waiting time after turning ON the OSC3 oscillation, before starting the FSK operation. Note that the oscillation start time will vary somewhat depending on the oscillator and on the externally attached parts.

(2)In order to decrease current consumption, the FSK demodulator and the OSC3 oscillation circuit should be turned OFF when their operations are not necessary.

(3)When detecting a carrier, the FSK demodulator may output invalid data at the rising edge of the CDET signal. In this case, the first byte received to the serial interface (2) may result in a parity error or a framing error. As this byte is generally used as a leader code, ignore the error in the processing.

Interrupt

(1)The interrupt factor flags are set when the interrupt condition is established, even if the interrupt mask registers are set to "0".

(2)After an interrupt occurs, the same interrupt will occur again if the interrupt enabled state (I flag = "1") is set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset (write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt enabled state.

(3)After an initial reset, all the interrupts including NMI are masked until both the stack pointers SP1 and SP2 are set with the software. Be sure to set the SP1 and SP2 in the initialize routine.

Further, when re-setting the stack pointer, the SP1 and SP2 must be set as a pair. When one of them is set, all the interrupts including NMI are masked and interrupts cannot be accepted until the other one is set.

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S1C63558 TECHNICAL AMANUAL