Fujitsu C145-C037-01EN Figure 5.2 Parallel interface output circuit 5.2.2 Connector pin assignment, Figure 5.3 Parallel interface connector (IEEE1284-B), Table 5.1 Parallel interface signals

5-2
Figure 5.2 Parallel interface output circuit
5.2.2 Connector pin assignment
Connector (cable side): Shielded plug
Amphenol DDK57FE-30360 or equivalent
Figure 5.3 shows the parallel interface connector.
Output circuit: SN74LS06 or equivalent
Figure 5.2 shows the parallel interface output circuit.
Figure 5.3 Parallel interface connector (IEEE1284-B)
Signal definition:
Table 5.1 lists parallel interface signals and their functions.
Table 5.1 Parallel interface signals
+5 V
1 kΩ
(Cable side)
(Male type)
36
18
1
19
Return
line pin
number
19
Signal
Compati mode
Nibble mode
Data Strobe
(DSTB)
Host Clock
Description
• Strobe pulse for reading data (Data 1 to Data 8).
The printer reads data when this signal is low.
• The pulse width must be 0.5 µs or more at the
printer’s receiving terminal.
This signal is set high when the host requests the
reverse data transfer phase (nibble mode).
Connector
pin
number
1
Direction
Input