Hitachi HTS541660J9SA00 manual Phy Event Counter, Counter Reset Mechanisms, Counter Identifiers

Models: HTS541640J9SA00 HTS541616J9SA00 HTS541680J9SA00 HTS541612J9SA00 HTS541660J9SA00

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Travelstar 5K160 (SATA) Hard Disk Drive Specification

6

 

 

LBA High

7

 

 

Device

8

 

 

LBA Low Previous

9

 

 

LBA Mid Previous

10

 

 

LBA High Previous

11

 

 

Reserved

12

 

 

Sector Count

13

 

 

Sector Count Previous

14

– 255

 

Reserved

256 – 510

 

Vendor Unique

511

 

Data Structure Checksum

Figure 58 Command Error information

The TAG field (Byte 0 bits 4-0) contains the tag number corresponding to a queued command, if the NQ bit is cleared.

The NQ field (Byte 0 bit 7) indicates whether the error condition was a result of a non-queued or not. If it is cleared, the error information corresponds to a queued command specified by the tag number indicated in the TAG field.

The bytes 1 to 13 correspond to the contents of Shadow Register Block when the error was reported.

The Data Structure Checksum (Byte 511) contains the 2’s complement of the sum of the first 511 bytes in the data structure. The sum of all 512 bytes of the data structure will be zero when the checksum is correct.

14.16.5Phy Event Counter

Phy Event Counters are a feature to obtain more information about Phy level events that occur on the interface. The counter values are not retained across power cycles. The counter values are preserved across COMRESET and software resets.

14.16.5.1Counter Reset Mechanisms

There are 2 mechanisms by which the host can explicitly cause the Phy counters to be reset. The first mechanism is to issue a BIST Activate FIS to the drive. The second mechanism uses the Read Log Ext command. When the drive receives a Read Log Ext command for log page 11h and bit 0 in Feature register is set to one, the drive returns the current counter values for the command and then resets all Phy event counter values.

14.16.5.2Counter Identifiers

Each counter begins with a 16-bit identifier. The following table defines the counter value for each identifier.

For all counter descriptions, “transmitted” refers to items sent by the drive to the host and “received” refers to items received by the drive from the host.

Bits 14:12 of the counter identifier convey the number of significant bits that counter uses. All counter values consumes a multiple of 16-bits. The valid values for bit 14:12 and the corresponding counter size are:

1h

16-bit counter

2h

32-bit counter

3h

48-bit counter

4h

64-bit counter

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Hitachi HTS541660J9SA00, HTS541640J9SA00, HTS541680J9SA00 Phy Event Counter, Counter Reset Mechanisms, Counter Identifiers