IBM 560E manual Microprocessor

P

microprocessor(continued)						POST		(continued)
cache		memory		operation		2-2	memory		errors		2-14
mode switch compatibility 2-28parity check 2-26
performance				1-8			password			2-29
real address mode 2-28							reset			2-28
specifications					1-3, 1-8		ROM test 2-13
mode switch, protected 2-28 power
model identifier 1-2							cable		1-9
model/submodel bytes 1-2							loss		2-21
description				2-2		power		supply 1-11
model identifier 1-2							battery pack (lithium ion) 1-13
mouse							connector			1-12
connector			2-4				output protection 1-12
signals			2-4				output voltages 1-11
							outputs			1-11
N							voltage sequencing 1-12
						power-on password 2-29
NMI (nonmaskable				interrupt) 2-26power-on					self-test (POST)
O							cache test 2-2
							error		codes		2-31
							memory		errors		2-14
output	protection,				power
							parity		check		2-26
supply		1-12
							password			2-29
output	voltage			sequencing		1-12
							reset			2-28
overvoltage			fault		1-12		ROM test 2-13
						protected				mode	switch 2-28

page hit 1-8 page miss 1-8

parallel controller port 1-4 parity check enable 2-27 password, power-on 2-29 PCMCIA 3-7

interface		1-7
slots	1-4, 3-7
subsystem		3-7
Pentium	90/120MHz 1-3

performance, system 1-8 ports

parallel 1-4 serial 1-4 system 2-26

POST

cache test 2-2 error codes 2-31

R

RAM (random access memory) 2-13

I/O operations, RT/CMOS 2-18 subsystem 2-13

RAM subsystem 1-3

read-only memory (ROM) 1-3, 2-13 real mode switch 2-28 real-time clock 2-16

bytes, RT/CMOS 2-19

refresh rate, specifications 1-8 refresh request 2-27 registers

miscellaneous system 2-26 RT/CMOS address and NMI

mask 2-17 RT/CMOS data 2-17 RT/CMOS status 2-21

Index X-3