IBM 560E manual Ram I/O, Operations, Rt/Cmos

RT/CMOS	RAM I/O	Operations
During	I/O	operations to	the RT/CMOS RAM addresses, you should
mask interrupts to prevent			other interrupt routines from changing the

RT/CMOS address register before data is read or written. After I/O operations, you should leave the RT/CMOS address and NMI mask

register (hex

0070) pointing

to status

register

D

(hex

00D).

Attention

The operation

following a write to hex

0070 should

access hex

0071; otherwise, intermittent failures of

the

RT/CMOS RAM

can

occur.

Writing

to

the

RT/CMOS RAM requires the following:

1. Write

the

RT/CMOS

RAM

address

to

the

RT/CMOS

address

and

NMI

mask

register

(hex 0070).

2. Write

the

data

to

the

RT/CMOS

data

register

(hex

0071).

3.Write the address, hex 0F, to the RT/CMOS and NMI mask register; this leaves hex 0070 pointing to the shutdown status byte (hex 0F).

4.Read address hex 0071 to restore the RT/CMOS.

Reading from the RT/CMOS RAM requires the following steps:

1. Write the	RT/CMOS	RAM address to the RT/CMOS and NMI
mask register	(hex	0070).

2. Read the data from the RT/CMOS data register (hex 0071).

3.Write the address, hex 0F, to the RT/CMOS and NMI mask register; this leaves hex 0070 pointing to the shutdown status byte (hex 0F).

4.Read address hex 0071 to restore the RT/CMOS.

2-18ThinkPad 560/560E System Board