CMOS RAM Configuration
Figure 2-20 shows the bit definitions for the CMOS RAM configuration bytes.
Diagnostic Status | Byte (Hex 00E) |
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Bit | Function |
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7 | |
6 | Configuration record and checksum status |
5Incorrect configuration
4Memory size mismatch
3 | Hard | disk | controller/drive C initialization status |
2 | Time | status | indicator |
1, 0 | Reserved |
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Bit | 7 | When | set | to | 1, | this | bit | indicates | that | the | clock | |||||
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| has | lost | power. |
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Bit | 6 | When set to 1, this bit indicates that the checksum is | ||||||||||||||
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Bit | 5 | This |
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| equipment byte (hex 014). When set to 1, this bit |
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| indicates | that | the configuration information is incorrect. | ||||||||||||
Bit | 4 | When | set | to | 1, | this | bit | indicates | that | the | memory | size | ||||
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| does | not | match | the | configuration information. |
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Bit | 3 | When | set | to | 1, | this bit indicates that the | controller | or hard | ||||||||
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| drive failed | initialization. |
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Bit | 2 | When | set | to | 1, | this | bit | indicates | that | the | time | is | invalid. | |||
Bits | 1, These0 | bits are reserved. |
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Shutdown | Status | Byte | (Hex | 00F): | This byte is defined by the |
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programs. |
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