IBM 560E manual Miscellaneous System Functions and Ports, Rt/Cmos, Address Register. See

Miscellaneous System Functions and Ports

This section provides information about nonmaskable interrupts (NMIs), the power-on password, and hardware compatibility.

Nonmaskable

Interrupt

(NMI)

The

NMI

signals the system microprocessor that a parity error

or a

channel check timeout has occurred. This situation

can

cause lost

data

or

an overrun error on some I/O devices. The

NMI

masks

all

other interrupts. The interrupt return (IRET) instruction restores the

interrupt

flag to the state it was

in

before

the

interrupt

occurred. A

system reset

causes a

reset

of

the

NMI.

The

NMI

requests from

system

board

parity and

channel

check

are

subject

to mask control with the NMI mask bit in the

RT/CMOS

Address

register. See

“RT/CMOS

Address

and NMI

Mask

Register

(Hex

0070)” on

page 2-17. The

power-on

default

of

the

NMI

mask

is

1 (NMI

disabled). Before

the

NMI

is enabled after

a

power-on reset,

the

parity-check states are initialized by POST.

Attention

The

operation

following

a

write to

hex

0070

should

access

hex

0071; otherwise, intermittent failures of the RT/CMOS

RAM

can

occur.

2-26ThinkPad 560/560E System Board