IBM 560E manual Address Space Hex C0000-C7FFF is L1 cacheablecode for, Read Operations. onlyIf

When

the

microprocessor

performs

a

memory read, the data address

is used to find the data

in

the

cache. If the data is found (a hit), it is

read

from

the

cache

memory

and

no

external bus cycle occurs. If

the

data

is

not

found

(a

miss),

an

external

bus

cycle

is used to

read

the

data

from

system

memory. If

the address

of

the

missed data

is

in a cacheable address space,

the data is stored in the cache

memory and

the

remainder

of

the

cache line

is

read.

When the microprocessor performs a memory write, the data

address is used to search

the

cache. If the address is found

(a

hit),

the data is written to the cache

and no external bus cycle is used

to

write the data to system memory. (If the address of the write

operation was not in the cache

memory but was in cacheable

address space, the data is read

back into the cache memory and the

remainder

of

the

cache

line

is

read.)

Cacheable

Address

Space

Cacheable

address

space

is

defined as system

memory that

resides

on

the

system

board

(0–640KB

and

1MB–40MB ñ).or Nothing80MB

in

address

range

hex A0000–BFFFF, I/O address space, or memory

in

any

AT

slot

is

cached.

ROM

address

space

(hex C0000–C7FFF) is L1 cacheablecode for

read

operations. onlyIf

data

in

this

address range

is already

in

cache memory and the address range is written to, the cached line is invalidated and is read again from RAM (in which the BIOS is shadowed in).

ñ Cacheability	of	system memory is up to 64MB in the L2 cache, and is up to 4GB in
the on-chip	L1	cache.

ThinkPad 560/560E System Board 2-3