EM78P259N/260N

8-Bit Microprocessor with OTP ROM

0 = increment if the transition from low to high takes place on the TCCC pin

1 = increment if the transition from high to low takes place on the TCCC pin

6.2.6 IOCA0 (IR and TCCC Scale Control Register)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

TCCCSE

TCCCS2

TCCCS1

TCCCS0

IRE

HF

LGP

IROUTE

 

 

 

 

 

 

 

 

Bit 7 (TCCCSE): Scale enable bit for TCCC

An 8-bit counter is provided as scaler for TCCC and IR-Mode. When in IR-Mode, TCCC counter scale uses the low time segments of the pulse generated by Fcarrier frequency modulation (see Fig. 6-11 in Section 6.8.2, Function Description).

0 = scale disable bit, TCCC rate is 1:1

1 = scale enable bit, TCCC rate is set as Bit 6 ~ Bit 4

18 •

Product Specification (V1.2) 05.18.2007

 

(This specification is subject to change without further notice)

Page 24
Image 24
IBM EM78P259N/260N manual IOCA0 IR and Tccc Scale Control Register, Bit Microprocessor with OTP ROM