EM78P259N/260N
Elan Microelectronics Corporation
Contents
6.1
Reset and Wake-up
TCC/WDT and Prescaler
Analog-To-Digital Converter ADC
11.4
11.1
11.2
11.3
Date
Doc. Version Revision Description
General Description
Features
Bit Microprocessor with OTP ROM
Pin DIP/SOP/SSOP
Block Diagram
Pin Assignment
Pin DIP/SOP
Pin Description
Symbol Pin No Type Function
EM78P259NP/M
EM78P260NP/M/KM
2 R1 Time Clock /Counter
Function Description
Operational Registers
1 R0 Indirect Address Register
EM78P259N/260N
Cont
Bit Microprocessor with OTP ROM Data Memory Configuration
Bits 5~0
5 R4 RAM Select Register
Bit 4 T
Bit
Bit 7 ~ Bit
Bit 7 ~ Bit 4 C3 ~ C0 Calibrator of internal RC mode
6 R5 ~ R6 Port 5 ~ Port
7 R7 Port
8 R8 Aisr ADC Input Select Register
Bit 3 Adpd
9 R9 Adcon ADC Control Register
Bit 2 ~ Bit 0 Unimplemented, read as ‘0’
RA Adoc ADC Offset Calibration Register
RB Addata Converted Value of ADC
Bit 5 ~ Bit 3 VOF2 ~ VOF0 Offset voltage bits
RD ADDATA1L Converted Value of ADC
RC ADDATA1H Converted Value of ADC
RE Interrupt Status 2 & Wake-up Control Register
16 R10 ~ R3F
RF Interrupt Status 2 Register
All of these are 8-bit general-purpose registers
Accumulator
Special Purpose Registers
Control Register
Bit 4 & Bit 3 COS1 & COS0 Comparator/OP Select bits
3 IOC50 ~ IOC70 I/O Port Control Register
4 IOC80 Comparator and Tcca Control Register
Bit 7 & Bit 6 Not used
Bit 0 Tcccte Tccc signal edge
Bit 6 Tccben Tccb enable bit 0 = disable Tccb
Bit 4 Tccbte Tccb signal edge
Tccc signal source
IOCA0 IR and Tccc Scale Control Register
Bit 0 Iroute
Bit 3 IRE
Bit 2 HF
Bit 1 LGP
Bit OD67 OD66 OD65 OD64 OD63 OD62 OD61 OD60
IOCB0 Pull-down Control Register
IOCC0 Open-Drain Control Register
Bit PD57 PD56 PD55 PD54 PD53 PD52 PD51 PD50
IOCE0 WDT Control & Interrupt Mask Registers
IOCD0 Pull-high Control Register
Bit PH57 PH56 PH55 PH54 PH53 PH52 PH51 PH50
IOCF0 Interrupt Mask Register
Lpwtif interrupt enable bit
= Disable Lpwtif interrupt
= Enable Lpwtif interrupt
13 IOC61 Tccb Counter
12 IOC51 Tcca Counter
15 IOC81 Tccc Counter
14 IOC71 TCCBH/MSB Counter
IOCA1 High Time Register
16 IOC91 Low Time Register
IOCB1 High/Low Time Scale Control Register
Bit 2 ~ Bit 0 LTS2 ~ LTS0 Low time scale bits
IOCC1 TCC Prescaler Counter
TCC prescaler counter can be read and written to
TCC/WDT and Prescaler
MUX
I/O Ports
I/O Port and I/O Control Register Circuit for P60 /INT
I/O Port and I/O Control Register Circuit for Port 50 ~ P57
Wake-up Wake-up and Interrupt
Reset and Wake-up
Reset and Wake-up Operation
Usage of Port 5 Input Change Wake-up/Interrupt Function
EM78P259N/260N
Select Segment
Signal Sleep Mode Normal Mode
Comparator
Following summarizes the initialized values for registers
Address Name Reset Type Bit
Name Reset Type Bit
HTR7 HTR6 HTR5 HTR4 HTR3 HTR2 HTR1 HTR0
Aisr
Tcif
Controller Reset Block Diagram
T and P Status under Status R3 Register
Interrupt
Event
EM78P259N/260N
Interrupt Vector Interrupt Status Priority
Reti
Bit 7 ~ Bit 3 ADE3 Bit 2 ADE2
Analog-to-Digital Converter ADC
ADC Control Register AISR/R8, ADCON/R9, ADOC/RA
1.1 R8 Aisr ADC Input Select Register
P54/TCC/VREF Pin Priority High Medium Low
1.2 R9 Adcon AD Control Register
P54
= ADC is operating
While the CPU is operating
RA Adoc AD Offset Calibration Register
AD Conversion Time
ADC Operation during Sleep Mode
ADC Data Register ADDATA/RB, ADDATA1H/RC, ADDATA1L/RD
ADC Sampling Time
Programming Process
Programming Process/Considerations
Follow these steps to obtain data from the ADC
Define Bits in Adcon
Sample Demo Programs Define a General Register
Define a Control Register
ADC Control Register
AD power on
Overview
Infrared Remote Control Application/PWM Waveform Generation
Fcarrier
Function Description
IRE Irout
IR/PWM Related Status/Data Registers
Programming the Related Registers
Address Name Bit
EM78P259N/260N
Under Tcca Counter IOC51
Timer/Counter
Under Tccb Counter IOC61
Under Tccc Counter IOC81
Related Tccx Status/Data Registers
Comparator
Comparator Output
External Reference Signal
Wake-up from Sleep Mode
Using a Comparator as an Operation Amplifier
Comparator Interrupt
Conditions
Oscillator
Oscillator Modes
Oscillator Modes
Oscillator Type
Crystal Oscillator/Ceramic Resonators Crystal
Frequency C1pF C2pF
18 Serial Mode Crystal/Resonator Circuit Diagram
External RC Oscillator Mode
40C ~ +85C 3V~5.5V Total
Internal RC Oscillator Mode
Internal Drift Rate RC Frequency Temperature
Cext Rext Average Fosc 5V, 25C Average Fosc 3V, 25C
External Power-on Reset Circuit
Power-on Considerations
Programmable WDT Time-out Period
EM78P260N
Residual Voltage Protection
Vdd
EM78P259N
Word Bit Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit
Code Option
Code Option Register Word
Word Word1 Bit12 ~ Bit0
Bit 2 ~ 0 PR2 ~ PR0 Protect Bits
= Pulses equal to 8/fc s is regarded as signal
= Pulses equal to 32/fc s is regarded as signal default
Bit Microprocessor with OTP ROM Bit 3 HLP
Instruction Set
Bit 1 & Bit 0 RCM1, RCM0 RC mode selection bits
Customer ID Register Word
Instruction Binary
Following are the EM78P259N/260N instruction set
Mnemonic Operation Status Affected
Items Rating
Absolute Maximum Ratings
Symbol Parameter Condition Min Typ Max Unit
DC Electrical Characteristics
Ta=25 C, VDD=5.0V±5%, VSS=0V
Voltage Min Typ Max
Internal RC Drift Rate
Vdd=2.5V to 5.5V, Vss=0V, Ta=25C
AD Converter Characteristics
Device Characteristics
Comparator OP Characteristics
Vdd = 5.0V, Vss=0V, Ta=25C
Symbol Parameter Conditions Min Typ Max Unit
AC Electrical Characteristic
Ta=25C, VDD=5V±5%, VSS=0V
TCC Input Timing CLKS=0
Timing Diagrams
Reset Timing CLK=0
AC Test Input/Output Waveform
Package Type Pin Count Package Size
Package Type
Package Information
18-Lead Plastic Dual in line Pdip 300 mil
838
18-Lead Plastic Small Outline SOP 300 mil
650
Lead Plastic Shrink Small Outline Ssop 209 mil
Lead Plastic Dual-in-line Pdip 300 mil
Lead Plastic Small Outline SOP 300 mil
Address Trap Detect
Quality Assurance and Reliability
Test Category Test Conditions Remarks