EM78P259N/260N

8-Bit Microprocessor with OTP ROM

Bit 7 (WDTPS): WDT Time-out Period Selection bit

WDT Time

Watchdog Time*

1

0

18ms

4.5 ms

*These are theoretical values provided for reference only

Bit 6 (CYES): Instruction cycle selection bit 0 = one instruction cycle.

1 = two instructions cycles (default)

Bits 5, 4, 3, & Bit 2 (C3, C2, C1, C0): Calibrator of internal RC mode

C3, C2, C1, & C0 must be set to “1” only (auto-calibration).

Bit 1 & Bit 0 (RCM1, RCM0): RC mode selection bits

RCM 1

RCM 0

 

Frequency (MHz)

 

1

1

1

0

01

00

4

8

1

455kHz

6.13.3 Customer ID Register (Word 2)

Word 2

Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

X

X

X

X

X

X

X

X

X

X

X

X

X

Bit 12 ~ 0: Customer’s ID code

6.14 Instruction Set

Each instruction in the instruction set is a 13-bit word divided into an OP code and one or more operands. Normally, all instructions are executed within one single instruction cycle (one instruction consists of 2 oscillator periods), unless the program counter is changed by instructions "MOV R2,A," "ADD R2,A," or by instructions of arithmetic or logic operation on R2 (e.g., "SUB R2,A," "BS(C) R2,6," "CLR R2," etc.). In this case, these instructions need one or two instruction cycles as determined by Code Option Register CYES bit.

In addition, the instruction set has the following features:

1.Every bit of any register can be set, cleared, or tested directly.

2.The I/O registers can be regarded as general registers. That is, the same instruction can operate on I/O registers.

Product Specification (V1.2) 05.18.2007

• 69

(This specification is subject to change without further notice)

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IBM EM78P259N/260N manual Instruction Set, Customer ID Register Word, Bit 1 & Bit 0 RCM1, RCM0 RC mode selection bits