IBM EM78P259N/260N 8.1 AD Converter Characteristics

EM78P259N/260N
8-Bit Microprocessor with OTP ROM
74 • Product Specification (V1.2) 05.18.2007
(This specification is subject to change without further notice)
8.1 AD Converter Characteristics
Vdd=2.5V to 5.5V, Vss=0V, Ta=25°C
Symbol Parameter Condition Min. Typ. Max. Unit
VAREF 2.5 – Vdd V
VASS
Analog reference voltage VAREF - VASS ≥ 2.5V
Vss – Vss V
VAI Analog input voltage – VASS – VAREF V
Ivdd 750 850 1000 uA
IAI1 Ivref Analog supply current Vdd=VAREF=5.0V, VASS =0.0V
(V reference from Vdd) –10 0 +10 uA
Ivdd 500 600 820 uA
IAI2 IVref Analog supply current Vdd=VAREF=5.0V, VASS=0.0V
(V reference from VREF) 200 250 300 uA
IOP OP current Vdd=5.0V, OP used
Output voltage swing 0.2V to 4.8V 450 550 650 uA
RN1 Resolution VREFS=0, Internal VDD
VDD=5.0V, VSS = 0.0V − 9 10 Bits
RN2 Resolution VREFS=1, External VREF
VDD=VREF=5.0V, VSS = 0.0V − 11 12 Bits
LN1 Linearity error Vdd = 2.5 to 5.5V Ta=25°C 0 ±4 ±8 LSB
LN2 Linearity error VDD= 2.5 to 5.5V Ta=25°C 0 ±2 ±4 LSB
DNL Differential nonlinear error Vdd = 2.5 to 5.5V Ta=25°C 0 ±0.5 ±0.9 LSB
FSE1 Full scale error Vdd=VAREF=5.0V, VASS =0.0V ±0 ±4 ±8 LSB
FSE2 Full scale error VDD=VREF=5.0V, VSS = 0.0V ±0 ±2 ±4 LSB
OE Offset error Vdd=VAREF=5.0V, VASS =0.0V ±0 ±2 ±4 LSB
ZAI Recommended impedance of
analog voltage source – 0 8 10 KΩ
TAD ADC clock period Vdd=VAREF=5.0V, VASS =0.0V 4 – – μs
TCN AD conversion time Vdd=VAREF=5.0V, VASS =0.0V 15 – 15 TAD
ADIV ADC OP input voltage range Vdd=VAREF=5.0V, VASS =0.0V 0 – VAREF V
0 0.2 0.3
ADOV ADC OP output voltage swing Vdd=VAREF=5.0V, VASS
=0.0V,RL=10KΩ 4.7 4.8 5 V
ADSR ADC OP slew rate Vdd=VAREF=5.0V, VASS =0.0V 0.1 0.3 – V/us
TAD A/D clock period VDD=VREF=5.0V, VSS = 0.0V 4 − − µs
TCN A/D conversion time VDD=VREF=5.0V, VSS = 0.0V 15 − 15 TAD
PSR Power Supply Rejection Vdd=5.0V±0.5V ±0 – ±2 LSB
Note: 1. These parameters are hypothetical, have not been tested and are provided for design reference only.
2. There is no current consumption when ADC is off other than minor leakage current.
3. AD conversion result will not decrease when an increase of input voltage and no missing code will result.