Absolute Maximum Ratings, Items Rating | IBM EM78P259N/260N specification

EM78P259N/260N 8-Bit Microprocessor with OTP ROM

	Instruction Binary				HEX	Mnemonic	Operation	Status Affected
	Instruction Binary				HEX	Mnemonic	Operation	Status Affected


	0	0101	01rr	rrrr	05rr	INC R	R+1 → R	Z
	0	0101	10rr	rrrr	05rr	DJZA R	R-1 → A, skip if zero	None
	0	0101	11rr	rrrr	05rr	DJZ R	R-1 → R, skip if zero	None
	0	0110	00rr	rrrr	06rr	RRCA R	R(n) → A(n-1),R(0) → C, C → A(7)	C
	0	0110	01rr	rrrr	06rr	RRC R	R(n) → R(n-1),R(0) → C, C → R(7)	C
	0	0110	10rr	rrrr	06rr	RLCA R	R(n) → A(n+1),R(7) → C, C → A(0)	C
	0	0110	11rr	rrrr	06rr	RLC R	R(n) → R(n+1),R(7) → C, C → R(0)	C
	0	0111	00rr	rrrr	07rr	SWAPA R	R(0-3) → A(4-7),R(4-7) → A(0-3)	None
	0	0111	01rr	rrrr	07rr	SWAP R	R(0-3) ↔ R(4-7)	None
	0	0111	10rr	rrrr	07rr	JZA R	R+1 → A, skip if zero	None
	0	0111	11rr	rrrr	07rr	JZ R	R+1 → R, skip if zero	None
	0	100b	bbrr	rrrr	0xxx	BC R,b	0 → R(b)	None2
	0	101b	bbrr	rrrr	0xxx	BS R,b	1 → R(b)	None3
	0	110b	bbrr	rrrr	0xxx	JBC R,b	if R(b)=0, skip	None
	0	111b	bbrr	rrrr	0xxx	JBS R,b	if R(b)=1, skip	None
	1	00kk kkkk kkkk			1kkk	CALL k	PC+1 → [SP],(Page, k) → PC	None
	1	01kk kkkk kkkk			1kkk	JMP k	(Page, k) → PC	None
	1	1000	kkkk kkkk		18kk	MOV A,k	k → A	None
	1	1001	kkkk kkkk		19kk	OR A,k	A ∨ k → A	Z
	1	1010	kkkk kkkk		1Akk	AND A,k	A & k → A	Z
	1	1011	kkkk kkkk		1Bkk	XOR A,k	A ⊕ k → A	Z
	1	1100	kkkk kkkk		1Ckk	RETL k	k → A,[Top of Stack] → PC	None
	1	1101	kkkk kkkk		1Dkk	SUB A,k	k-A → A	Z, C, DC
	1	1111	kkkk kkkk		1Fkk	ADD A,k	k+A → A	Z, C, DC

1This instruction is applicable to IOC50 ~ IOCF0, IOC51 ~ IOCC1 only.

2This instruction is not recommended for RF operation.

3This instruction cannot operate under RF.

7 Absolute Maximum Ratings

Items			Rating
Temperature under bias		-40°C	to	85°C

Storage temperature		-65°C	to	150°C

Input voltage		Vss-0.3V	to	Vdd+0.5V

Output voltage		Vss-0.3V	to	Vdd+0.5V

Working Voltage		2.5V	to	5.5V

Working Frequency		DC	to	20MHz

Product Specification (V1.2) 05.18.2007

• 71

(This specification is subject to change without further notice)

Image 77

IBM EM78P259N/260N manual Absolute Maximum Ratings, Items Rating

Contents

EM78P259N/260N Elan Microelectronics Corporation Contents TCC/WDT and Prescaler Reset and Wake-upAnalog-To-Digital Converter ADC 6.1 11.2 11.111.3 11.4 Date Doc. Version Revision Description Bit Microprocessor with OTP ROM FeaturesGeneral Description Pin Assignment Block DiagramPin DIP/SOP Pin DIP/SOP/SSOP EM78P259NP/M Symbol Pin No Type FunctionPin Description EM78P260NP/M/KM Operational Registers Function Description1 R0 Indirect Address Register 2 R1 Time Clock /Counter EM78P259N/260N Cont Bit Microprocessor with OTP ROM Data Memory Configuration Bit 4 T 5 R4 RAM Select RegisterBit Bits 5~0 6 R5 ~ R6 Port 5 ~ Port Bit 7 ~ Bit 4 C3 ~ C0 Calibrator of internal RC mode7 R7 Port Bit 7 ~ Bit 8 R8 Aisr ADC Input Select Register Bit 3 Adpd 9 R9 Adcon ADC Control Register RB Addata Converted Value of ADC RA Adoc ADC Offset Calibration RegisterBit 5 ~ Bit 3 VOF2 ~ VOF0 Offset voltage bits Bit 2 ~ Bit 0 Unimplemented, read as ‘0’ RE Interrupt Status 2 & Wake-up Control Register RC ADDATA1H Converted Value of ADCRD ADDATA1L Converted Value of ADC All of these are 8-bit general-purpose registers RF Interrupt Status 2 Register16 R10 ~ R3F Control Register Special Purpose RegistersAccumulator 4 IOC80 Comparator and Tcca Control Register 3 IOC50 ~ IOC70 I/O Port Control RegisterBit 7 & Bit 6 Not used Bit 4 & Bit 3 COS1 & COS0 Comparator/OP Select bits Bit 4 Tccbte Tccb signal edge Bit 6 Tccben Tccb enable bit 0 = disable TccbTccc signal source Bit 0 Tcccte Tccc signal edge IOCA0 IR and Tccc Scale Control Register Bit 2 HF Bit 3 IREBit 1 LGP Bit 0 Iroute IOCC0 Open-Drain Control Register IOCB0 Pull-down Control RegisterBit PD57 PD56 PD55 PD54 PD53 PD52 PD51 PD50 Bit OD67 OD66 OD65 OD64 OD63 OD62 OD61 OD60 Bit PH57 PH56 PH55 PH54 PH53 PH52 PH51 PH50 IOCD0 Pull-high Control RegisterIOCE0 WDT Control & Interrupt Mask Registers = Disable Lpwtif interrupt Lpwtif interrupt enable bit= Enable Lpwtif interrupt IOCF0 Interrupt Mask Register 13 IOC61 Tccb Counter 12 IOC51 Tcca Counter 15 IOC81 Tccc Counter 14 IOC71 TCCBH/MSB Counter IOCB1 High/Low Time Scale Control Register 16 IOC91 Low Time RegisterIOCA1 High Time Register TCC prescaler counter can be read and written to IOCC1 TCC Prescaler CounterBit 2 ~ Bit 0 LTS2 ~ LTS0 Low time scale bits TCC/WDT and Prescaler MUX I/O Ports I/O Port and I/O Control Register Circuit for P60 /INT I/O Port and I/O Control Register Circuit for Port 50 ~ P57 Reset and Wake-up Operation Reset and Wake-upUsage of Port 5 Input Change Wake-up/Interrupt Function Wake-up Wake-up and Interrupt EM78P259N/260N Select Segment Signal Sleep Mode Normal Mode Comparator Following summarizes the initialized values for registers Address Name Reset Type Bit Name Reset Type Bit HTR7 HTR6 HTR5 HTR4 HTR3 HTR2 HTR1 HTR0 Aisr Tcif Controller Reset Block Diagram Event InterruptT and P Status under Status R3 Register EM78P259N/260N Interrupt Vector Interrupt Status Priority Reti ADC Control Register AISR/R8, ADCON/R9, ADOC/RA Analog-to-Digital Converter ADC1.1 R8 Aisr ADC Input Select Register Bit 7 ~ Bit 3 ADE3 Bit 2 ADE2 P54 1.2 R9 Adcon AD Control RegisterP54/TCC/VREF Pin Priority High Medium Low RA Adoc AD Offset Calibration Register While the CPU is operating= ADC is operating ADC Data Register ADDATA/RB, ADDATA1H/RC, ADDATA1L/RD ADC Operation during Sleep ModeADC Sampling Time AD Conversion Time Follow these steps to obtain data from the ADC Programming Process/ConsiderationsProgramming Process Define a Control Register Sample Demo Programs Define a General RegisterADC Control Register Define Bits in Adcon AD power on Overview Infrared Remote Control Application/PWM Waveform Generation Fcarrier Function Description IRE Irout Address Name Bit Programming the Related RegistersIR/PWM Related Status/Data Registers EM78P259N/260N Under Tccb Counter IOC61 Timer/CounterUnder Tcca Counter IOC51 Under Tccc Counter IOC81 Related Tccx Status/Data Registers Comparator Comparator Output External Reference Signal Comparator Interrupt Using a Comparator as an Operation AmplifierWake-up from Sleep Mode Oscillator Modes OscillatorOscillator Modes Conditions Frequency C1pF C2pF Crystal Oscillator/Ceramic Resonators CrystalOscillator Type 18 Serial Mode Crystal/Resonator Circuit Diagram External RC Oscillator Mode Internal Drift Rate RC Frequency Temperature Internal RC Oscillator ModeCext Rext Average Fosc 5V, 25C Average Fosc 3V, 25C 40C ~ +85C 3V~5.5V Total Programmable WDT Time-out Period Power-on ConsiderationsExternal Power-on Reset Circuit Vdd Residual Voltage ProtectionEM78P259N EM78P260N Code Option Register Word Code OptionWord Word1 Bit12 ~ Bit0 Word Bit Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit = Pulses equal to 32/fc s is regarded as signal default = Pulses equal to 8/fc s is regarded as signalBit Microprocessor with OTP ROM Bit 3 HLP Bit 2 ~ 0 PR2 ~ PR0 Protect Bits Customer ID Register Word Bit 1 & Bit 0 RCM1, RCM0 RC mode selection bitsInstruction Set Mnemonic Operation Status Affected Following are the EM78P259N/260N instruction setInstruction Binary Items Rating Absolute Maximum Ratings Ta=25 C, VDD=5.0V±5%, VSS=0V DC Electrical CharacteristicsSymbol Parameter Condition Min Typ Max Unit Voltage Min Typ Max Internal RC Drift Rate Vdd=2.5V to 5.5V, Vss=0V, Ta=25C AD Converter Characteristics Vdd = 5.0V, Vss=0V, Ta=25C Comparator OP CharacteristicsDevice Characteristics Ta=25C, VDD=5V±5%, VSS=0V AC Electrical CharacteristicSymbol Parameter Conditions Min Typ Max Unit Reset Timing CLK=0 Timing DiagramsAC Test Input/Output Waveform TCC Input Timing CLKS=0 Package Information Package Type18-Lead Plastic Dual in line Pdip 300 mil Package Type Pin Count Package Size 838 18-Lead Plastic Small Outline SOP 300 mil 650 Lead Plastic Shrink Small Outline Ssop 209 mil Lead Plastic Dual-in-line Pdip 300 mil Lead Plastic Small Outline SOP 300 mil Test Category Test Conditions Remarks Quality Assurance and ReliabilityAddress Trap Detect