Address Name Reset Type Bit | IBM EM78P259N/260N specification

EM78P259N/260N

8-Bit Microprocessor with OTP ROM

6.5.1.2Register Initial Values after Reset

The following summarizes the initialized values for registers.

Address

Name

Reset Type

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

		Bit Name	C57			C56			C55	C54	C53	C52	C51	C50
		Type	259		260	259		260	–	–	–	–	–	–
			N		N	N		N

N/A	IOC50	Power-on	0		1	0		1	1	1	1	1	1	1
		/RESET and WDT	0		1	0		1	1	1	1	1	1	1
		Wake-up from Pin	0		P	0		P	P	P	P	P	P	P
		Change

		Bit Name	C67			C66			C65	C64	C63	C62	C61	C60
		Power-on		1			1		1	1	1	1	1	1
N/A	IOC60	/RESET and WDT		1			1		1	1	1	1	1	1

		Wake-up from Pin		P			P		P	P	P	P	P	P
		Change

		Bit Name		X			X		X	X	X	X	X	C70
		Power-on		0			0		0	0	0	0	0	1
N/A	IOC70	/RESET and WDT		0			0		0	0	0	0	0	1

		Wake-up from Pin		P			P		P	P	P	P	P	P
		Change

		Bit Name		X			X		CMPOUT	COS1	COS0	TCCAEN	TCCATS	TCCATE
		Power-on		0			0		0	0	0	0	0	0
N/A	IOC80	/RESET and WDT		0			0		0	0	0	0	0	0

		Wake-up from Pin		P			P		P	P	P	P	P	P
		Change

		Bit Name	TCCBHE			TCCBEN			TCCBTS	TCCBTE	X	TCCCEN	TCCCTS	TCCCTE
		Power-on		0			0		0	0	0	0	0	0
N/A	IOC90	/RESET and WDT		0			0		0	0	0	0	0	0

		Wake-up from Pin		P			P		P	P	P	P	P	P
		Change

		Bit Name	TCCCSE			TCCCS2			TCCCS1	TCCCS0	IRE	HF	LGP	IROUTE
	IOCA0	Power-On		0			0		0	0	0	0	0	0
N/A		/RESET and WDT		0			0		0	0	0	0	0	0
	(IR CR)

		Wake-up from Pin		P			P		P	P	P	P	P	P
		Change

		Bit Name	/PD57			/PD56			/PD55	/PD54	/PD53	/PD52	/PD51	/PD50
	IOCB0	Power-on		1			1		1	1	1	1	1	1
N/A		/RESET and WDT		1			1		1	1	1	1	1	1
	(PDCR)

		Wake-up from Pin		P			P		P	P	P	P	P	P
		Change

		Bit Name	/OD67			/OD66			/OD65	/OD64	/OD63	/OD62	/OD61	/OD60
	IOCC0	Power-on		1			1		1	1	1	1	1	1
N/A		/RESET and WDT		1			1		1	1	1	1	1	1
	(ODCR)

		Wake-up from Pin		P			P		P	P	P	P	P	P
		Change

36 •	Product Specification (V1.2) 05.18.2007
	(This specification is subject to change without further notice)

Image 42

IBM EM78P259N/260N manual Following summarizes the initialized values for registers, Address Name Reset Type Bit

Contents

EM78P259N/260N Elan Microelectronics Corporation Contents Analog-To-Digital Converter ADC Reset and Wake-upTCC/WDT and Prescaler 6.1 11.3 11.111.2 11.4 Doc. Version Revision Description Date Features General DescriptionBit Microprocessor with OTP ROM Pin DIP/SOP Block DiagramPin Assignment Pin DIP/SOP/SSOP Symbol Pin No Type Function Pin DescriptionEM78P259NP/M EM78P260NP/M/KM 1 R0 Indirect Address Register Function DescriptionOperational Registers 2 R1 Time Clock /Counter EM78P259N/260N Bit Microprocessor with OTP ROM Data Memory Configuration Cont Bit 5 R4 RAM Select RegisterBit 4 T Bits 5~0 7 R7 Port Bit 7 ~ Bit 4 C3 ~ C0 Calibrator of internal RC mode6 R5 ~ R6 Port 5 ~ Port Bit 7 ~ Bit 8 R8 Aisr ADC Input Select Register 9 R9 Adcon ADC Control Register Bit 3 Adpd Bit 5 ~ Bit 3 VOF2 ~ VOF0 Offset voltage bits RA Adoc ADC Offset Calibration RegisterRB Addata Converted Value of ADC Bit 2 ~ Bit 0 Unimplemented, read as ‘0’ RC ADDATA1H Converted Value of ADC RD ADDATA1L Converted Value of ADCRE Interrupt Status 2 & Wake-up Control Register RF Interrupt Status 2 Register 16 R10 ~ R3FAll of these are 8-bit general-purpose registers Special Purpose Registers AccumulatorControl Register Bit 7 & Bit 6 Not used 3 IOC50 ~ IOC70 I/O Port Control Register4 IOC80 Comparator and Tcca Control Register Bit 4 & Bit 3 COS1 & COS0 Comparator/OP Select bits Tccc signal source Bit 6 Tccben Tccb enable bit 0 = disable TccbBit 4 Tccbte Tccb signal edge Bit 0 Tcccte Tccc signal edge IOCA0 IR and Tccc Scale Control Register Bit 1 LGP Bit 3 IREBit 2 HF Bit 0 Iroute Bit PD57 PD56 PD55 PD54 PD53 PD52 PD51 PD50 IOCB0 Pull-down Control RegisterIOCC0 Open-Drain Control Register Bit OD67 OD66 OD65 OD64 OD63 OD62 OD61 OD60 IOCD0 Pull-high Control Register IOCE0 WDT Control & Interrupt Mask RegistersBit PH57 PH56 PH55 PH54 PH53 PH52 PH51 PH50 = Enable Lpwtif interrupt Lpwtif interrupt enable bit= Disable Lpwtif interrupt IOCF0 Interrupt Mask Register 12 IOC51 Tcca Counter 13 IOC61 Tccb Counter 14 IOC71 TCCBH/MSB Counter 15 IOC81 Tccc Counter 16 IOC91 Low Time Register IOCA1 High Time RegisterIOCB1 High/Low Time Scale Control Register IOCC1 TCC Prescaler Counter Bit 2 ~ Bit 0 LTS2 ~ LTS0 Low time scale bitsTCC prescaler counter can be read and written to TCC/WDT and Prescaler I/O Ports MUX I/O Port and I/O Control Register Circuit for P60 /INT I/O Port and I/O Control Register Circuit for Port 50 ~ P57 Usage of Port 5 Input Change Wake-up/Interrupt Function Reset and Wake-upReset and Wake-up Operation Wake-up Wake-up and Interrupt EM78P259N/260N Select Segment Signal Sleep Mode Normal Mode Comparator Address Name Reset Type Bit Following summarizes the initialized values for registers Name Reset Type Bit HTR7 HTR6 HTR5 HTR4 HTR3 HTR2 HTR1 HTR0 Aisr Controller Reset Block Diagram Tcif Interrupt T and P Status under Status R3 RegisterEvent EM78P259N/260N Reti Interrupt Vector Interrupt Status Priority 1.1 R8 Aisr ADC Input Select Register Analog-to-Digital Converter ADCADC Control Register AISR/R8, ADCON/R9, ADOC/RA Bit 7 ~ Bit 3 ADE3 Bit 2 ADE2 1.2 R9 Adcon AD Control Register P54/TCC/VREF Pin Priority High Medium LowP54 While the CPU is operating = ADC is operatingRA Adoc AD Offset Calibration Register ADC Sampling Time ADC Operation during Sleep ModeADC Data Register ADDATA/RB, ADDATA1H/RC, ADDATA1L/RD AD Conversion Time Programming Process/Considerations Programming ProcessFollow these steps to obtain data from the ADC ADC Control Register Sample Demo Programs Define a General RegisterDefine a Control Register Define Bits in Adcon AD power on Infrared Remote Control Application/PWM Waveform Generation Overview Function Description Fcarrier IRE Irout Programming the Related Registers IR/PWM Related Status/Data RegistersAddress Name Bit EM78P259N/260N Timer/Counter Under Tcca Counter IOC51Under Tccb Counter IOC61 Under Tccc Counter IOC81 Comparator Related Tccx Status/Data Registers External Reference Signal Comparator Output Using a Comparator as an Operation Amplifier Wake-up from Sleep ModeComparator Interrupt Oscillator Modes OscillatorOscillator Modes Conditions Crystal Oscillator/Ceramic Resonators Crystal Oscillator TypeFrequency C1pF C2pF External RC Oscillator Mode 18 Serial Mode Crystal/Resonator Circuit Diagram Cext Rext Average Fosc 5V, 25C Average Fosc 3V, 25C Internal RC Oscillator ModeInternal Drift Rate RC Frequency Temperature 40C ~ +85C 3V~5.5V Total Power-on Considerations External Power-on Reset CircuitProgrammable WDT Time-out Period EM78P259N Residual Voltage ProtectionVdd EM78P260N Word Word1 Bit12 ~ Bit0 Code OptionCode Option Register Word Word Bit Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit Bit Microprocessor with OTP ROM Bit 3 HLP = Pulses equal to 8/fc s is regarded as signal= Pulses equal to 32/fc s is regarded as signal default Bit 2 ~ 0 PR2 ~ PR0 Protect Bits Bit 1 & Bit 0 RCM1, RCM0 RC mode selection bits Instruction SetCustomer ID Register Word Following are the EM78P259N/260N instruction set Instruction BinaryMnemonic Operation Status Affected Absolute Maximum Ratings Items Rating DC Electrical Characteristics Symbol Parameter Condition Min Typ Max UnitTa=25 C, VDD=5.0V±5%, VSS=0V Internal RC Drift Rate Voltage Min Typ Max AD Converter Characteristics Vdd=2.5V to 5.5V, Vss=0V, Ta=25C Comparator OP Characteristics Device CharacteristicsVdd = 5.0V, Vss=0V, Ta=25C AC Electrical Characteristic Symbol Parameter Conditions Min Typ Max UnitTa=25C, VDD=5V±5%, VSS=0V AC Test Input/Output Waveform Timing DiagramsReset Timing CLK=0 TCC Input Timing CLKS=0 18-Lead Plastic Dual in line Pdip 300 mil Package TypePackage Information Package Type Pin Count Package Size 18-Lead Plastic Small Outline SOP 300 mil 838 Lead Plastic Shrink Small Outline Ssop 209 mil 650 Lead Plastic Dual-in-line Pdip 300 mil Lead Plastic Small Outline SOP 300 mil Quality Assurance and Reliability Address Trap DetectTest Category Test Conditions Remarks