Sample Demo Programs Define a General Register | IBM EM78P259N/260N

EM78P259N/260N

8-Bit Microprocessor with OTP ROM

NOTE

In order to obtain accurate values, it is necessary to avoid any data transition on the

I/O pins during AD conversion.

6.7.6.2Sample Demo Programs

A. Define a General Register

R_0 == 0		; Indirect addressing register
PSW == 3		;	Status register
PORT5	== 5
PORT6	== 6	;
R_E== 0XE			Interrupt status register

B. Define a Control Register

IOC50 == 0X5 ; Control Register of Port 5

IOC60 == 0X6 ; Control Register of Port 6

C_INT== 0XF ; Interrupt Control Register

C. ADC Control Register
ADDATA == 0xB	; The contents are the results of ADC
AISR == 0x08	;	ADC input select register
ADCON == 0x9	;	7	6	5	4	3	2	1	0

;VREFS CKR1 CKR0 ADRUN ADPD ADIS2 ADIS1 ADIS0

D. Define Bits in ADCON

ADRUN == 0x4 ; ADC is executed as the bit is set

ADPD == 0x3 ; Power Mode of ADC

E. Program Starts
ORG	0	; Initial address
JMP	INITIAL	;

ORG 0x0C ; Interrupt vector

JMP CLRRE

;

;

;(User program section)

;

;

CLRRE:

MOV A,RE

AND A, @0BXX0XXXXX ; To clear the ADIF bit, “X” by application

MOV RE,A

BS ADCON, ADRUN ; To start to execute the next AD conversion if necessary

Product Specification (V1.2) 05.18.2007

• 49

(This specification is subject to change without further notice)

Image 55

IBM EM78P259N/260N manual Sample Demo Programs Define a General Register, Define a Control Register, ADC Control Register

Contents

EM78P259N/260N Elan Microelectronics Corporation Contents 6.1 Reset and Wake-upTCC/WDT and Prescaler Analog-To-Digital Converter ADC 11.4 11.111.2 11.3 Date Doc. Version Revision Description General Description FeaturesBit Microprocessor with OTP ROM Pin DIP/SOP/SSOP Block DiagramPin Assignment Pin DIP/SOP Pin Description Symbol Pin No Type FunctionEM78P259NP/M EM78P260NP/M/KM 2 R1 Time Clock /Counter Function DescriptionOperational Registers 1 R0 Indirect Address Register EM78P259N/260N Cont Bit Microprocessor with OTP ROM Data Memory Configuration Bits 5~0 5 R4 RAM Select RegisterBit 4 T Bit Bit 7 ~ Bit Bit 7 ~ Bit 4 C3 ~ C0 Calibrator of internal RC mode6 R5 ~ R6 Port 5 ~ Port 7 R7 Port 8 R8 Aisr ADC Input Select Register Bit 3 Adpd 9 R9 Adcon ADC Control Register Bit 2 ~ Bit 0 Unimplemented, read as ‘0’ RA Adoc ADC Offset Calibration RegisterRB Addata Converted Value of ADC Bit 5 ~ Bit 3 VOF2 ~ VOF0 Offset voltage bits RD ADDATA1L Converted Value of ADC RC ADDATA1H Converted Value of ADCRE Interrupt Status 2 & Wake-up Control Register 16 R10 ~ R3F RF Interrupt Status 2 RegisterAll of these are 8-bit general-purpose registers Accumulator Special Purpose RegistersControl Register Bit 4 & Bit 3 COS1 & COS0 Comparator/OP Select bits 3 IOC50 ~ IOC70 I/O Port Control Register4 IOC80 Comparator and Tcca Control Register Bit 7 & Bit 6 Not used Bit 0 Tcccte Tccc signal edge Bit 6 Tccben Tccb enable bit 0 = disable TccbBit 4 Tccbte Tccb signal edge Tccc signal source IOCA0 IR and Tccc Scale Control Register Bit 0 Iroute Bit 3 IREBit 2 HF Bit 1 LGP Bit OD67 OD66 OD65 OD64 OD63 OD62 OD61 OD60 IOCB0 Pull-down Control RegisterIOCC0 Open-Drain Control Register Bit PD57 PD56 PD55 PD54 PD53 PD52 PD51 PD50 IOCE0 WDT Control & Interrupt Mask Registers IOCD0 Pull-high Control RegisterBit PH57 PH56 PH55 PH54 PH53 PH52 PH51 PH50 IOCF0 Interrupt Mask Register Lpwtif interrupt enable bit= Disable Lpwtif interrupt = Enable Lpwtif interrupt 13 IOC61 Tccb Counter 12 IOC51 Tcca Counter 15 IOC81 Tccc Counter 14 IOC71 TCCBH/MSB Counter IOCA1 High Time Register 16 IOC91 Low Time RegisterIOCB1 High/Low Time Scale Control Register Bit 2 ~ Bit 0 LTS2 ~ LTS0 Low time scale bits IOCC1 TCC Prescaler CounterTCC prescaler counter can be read and written to TCC/WDT and Prescaler MUX I/O Ports I/O Port and I/O Control Register Circuit for P60 /INT I/O Port and I/O Control Register Circuit for Port 50 ~ P57 Wake-up Wake-up and Interrupt Reset and Wake-upReset and Wake-up Operation Usage of Port 5 Input Change Wake-up/Interrupt Function EM78P259N/260N Select Segment Signal Sleep Mode Normal Mode Comparator Following summarizes the initialized values for registers Address Name Reset Type Bit Name Reset Type Bit HTR7 HTR6 HTR5 HTR4 HTR3 HTR2 HTR1 HTR0 Aisr Tcif Controller Reset Block Diagram T and P Status under Status R3 Register InterruptEvent EM78P259N/260N Interrupt Vector Interrupt Status Priority Reti Bit 7 ~ Bit 3 ADE3 Bit 2 ADE2 Analog-to-Digital Converter ADCADC Control Register AISR/R8, ADCON/R9, ADOC/RA 1.1 R8 Aisr ADC Input Select Register P54/TCC/VREF Pin Priority High Medium Low 1.2 R9 Adcon AD Control RegisterP54 = ADC is operating While the CPU is operatingRA Adoc AD Offset Calibration Register AD Conversion Time ADC Operation during Sleep ModeADC Data Register ADDATA/RB, ADDATA1H/RC, ADDATA1L/RD ADC Sampling Time Programming Process Programming Process/ConsiderationsFollow these steps to obtain data from the ADC Define Bits in Adcon Sample Demo Programs Define a General RegisterDefine a Control Register ADC Control Register AD power on Overview Infrared Remote Control Application/PWM Waveform Generation Fcarrier Function Description IRE Irout IR/PWM Related Status/Data Registers Programming the Related RegistersAddress Name Bit EM78P259N/260N Under Tcca Counter IOC51 Timer/CounterUnder Tccb Counter IOC61 Under Tccc Counter IOC81 Related Tccx Status/Data Registers Comparator Comparator Output External Reference Signal Wake-up from Sleep Mode Using a Comparator as an Operation AmplifierComparator Interrupt Conditions OscillatorOscillator Modes Oscillator Modes Oscillator Type Crystal Oscillator/Ceramic Resonators CrystalFrequency C1pF C2pF 18 Serial Mode Crystal/Resonator Circuit Diagram External RC Oscillator Mode 40C ~ +85C 3V~5.5V Total Internal RC Oscillator ModeInternal Drift Rate RC Frequency Temperature Cext Rext Average Fosc 5V, 25C Average Fosc 3V, 25C External Power-on Reset Circuit Power-on ConsiderationsProgrammable WDT Time-out Period EM78P260N Residual Voltage ProtectionVdd EM78P259N Word Bit Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit Code OptionCode Option Register Word Word Word1 Bit12 ~ Bit0 Bit 2 ~ 0 PR2 ~ PR0 Protect Bits = Pulses equal to 8/fc s is regarded as signal= Pulses equal to 32/fc s is regarded as signal default Bit Microprocessor with OTP ROM Bit 3 HLP Instruction Set Bit 1 & Bit 0 RCM1, RCM0 RC mode selection bitsCustomer ID Register Word Instruction Binary Following are the EM78P259N/260N instruction setMnemonic Operation Status Affected Items Rating Absolute Maximum Ratings Symbol Parameter Condition Min Typ Max Unit DC Electrical CharacteristicsTa=25 C, VDD=5.0V±5%, VSS=0V Voltage Min Typ Max Internal RC Drift Rate Vdd=2.5V to 5.5V, Vss=0V, Ta=25C AD Converter Characteristics Device Characteristics Comparator OP CharacteristicsVdd = 5.0V, Vss=0V, Ta=25C Symbol Parameter Conditions Min Typ Max Unit AC Electrical CharacteristicTa=25C, VDD=5V±5%, VSS=0V TCC Input Timing CLKS=0 Timing DiagramsReset Timing CLK=0 AC Test Input/Output Waveform Package Type Pin Count Package Size Package TypePackage Information 18-Lead Plastic Dual in line Pdip 300 mil 838 18-Lead Plastic Small Outline SOP 300 mil 650 Lead Plastic Shrink Small Outline Ssop 209 mil Lead Plastic Dual-in-line Pdip 300 mil Lead Plastic Small Outline SOP 300 mil Address Trap Detect Quality Assurance and ReliabilityTest Category Test Conditions Remarks