MPCMM0002
Table 11. | Data Connector Pinouts (Sheet 2 of 2) |
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Signal Name |
| Count | Type | Description | Pin Name From Table 12 |
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CFG_STX |
| 1 | O | Serial transmit | A28 |
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CFG_SRX |
| 1 | I | Serial receive | D28 |
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CFG_SCTS |
| 1 | I | Serial clear to send | E28 |
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CFG_SRTS |
| 1 | O | Serial request to send | C28 |
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CFG_SDSR |
| 1 | I | Serial data set ready | E29 |
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CFG_SDTR |
| 1 | O | Serial data terminal ready | B28 |
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2 | I/O | Ethernet port 0 to switch | A41, B41 | ||
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2 | I/O | Ethernet port 0 from switch | A43, B43 | ||
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2 | I/O | Ethernet port 1 to switch | A45, B45 | ||
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| 2 | I/O | Ethernet port 1 from switch | A 47, B47 | |
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2 | I/O | Reserved for GbE to switch | D41, E41 | ||
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2 | I/O | Reserved for GbE from switch | D43, E43 | ||
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2 | I/O | Reserved for GbE to switch | D45, E45 | ||
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2 | I/O | Reserved for GbE from switch | D47, E47 | ||
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BP_NGO |
| 1 | O | Negotiate output to other CMM | E14 |
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BP_NGOI |
| 1 | I | Negotiate input from other CMM | E15 |
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BP_HLY# |
| 1 | O | Healthy output to other CMM | E12 |
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BP_HLYI# |
| 1 | I | Healthy input from other CMM | E13 |
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BP_PRESI# |
| 1 | I | Other CMM is present (0V) | E11 |
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BP_PRES# |
| 1 | O | Tie to ground | E10 |
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GA[0:7] |
| 8 | I | Hardware Address | |
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GND |
| 61 | I | Ground | C33, |
| C37, | ||||
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| C41, |
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| C45, |
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FRU_VCCA and B |
| 2 | I | Power to CDMs (shelf FRUs) and distribution | E22, E23 |
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RESV[1:11] |
| 11 |
| Reserved | |
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GPIO[1:10] |
| 10 | I | General Purpose Input Only | |
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BP_CMM_RESET# | 1 | O | Inter CMM reset output to another CMM | C29 | |
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BP_CMM_RESETI# | 1 | I | Inter CMM reset input from another CMM | D29 | |
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| Table 12 identifies each pin on the data connector at the intersection of each row | ||||
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Table 12. | Data Connector Pinouts Matrix (Sheet 1 of 3) |
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| E | D | C | B | A |
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1 | GND |
| GND | GND | GND | GND |
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2 | GA0 |
| BP_N_SDA_[1]_B | BP_N_SCL_[1]_B | BP_N_SDA_[1]_A | BP_N_SCL_[1]_A |
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3 | GA1 |
| BP_N_SDA_[2]_B | BP_N_SCL_[2]_B | BP_N_SDA_[2]_A | BP_N_SCL_[2]_A |
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4 | GA2 |
| BP_N_SDA_[3]_B | BP_N_SCL_[3]_B | BP_N_SDA_[3]_A | BP_N_SCL_[3]_A |
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Intel NetStructure® MPCMM0002 Chassis Management Module |
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Hardware TPS | July 2007 |
38 | Order Number: |
