Intel manual Revision History, Disclaimers, STL2 Server Board TPS, Date, Modifications, Number

Revision History STL2 Server Board TPS

		Revision History
Date	Revision	Modifications
	Number
6/15/00	0.5	Initial release.
6/20/00	0.6	Updated connector reference designators
7/7/00	0.61	Updated silkscreen reference designators to agree with STL2 FAB2.
		Removed figure 2-3, IB6566 IRQ routing diagram. Added BIOS recovery
		jumper information. Corrected grammar / spelling errors. Updated table 5-1,
		STL2 Hardware Sensors, per recent information
8/24/00	0.7	Updated Section 5: Jumpers and Connectors, per modifications to the STL2
		Fab3 Silver boards. Updated Section 4.2: BIOS Setup, per modifications
		included in BIOS Release 1.1. Added power consumption information to
		Section 6.
9/22/00	1.0	Released version

Disclaimers

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Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

This document contains information on products in the design phase of development. Do not finalize a design with this information. Revised information will be published when the product is available. Verify with your local sales office that you have the latest datasheet before finalizing a design.

The STL2 platform may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Copyright © Intel Corporation 2000. *Other brands and names are the property of their respective owners.

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