Intel STL2 manual 4.1.1System BIOS, 4.1.2Flash Update Utility, 4.1.2.1System Flash ROM Layout

Basic Input Output System (BIOS) STL2 Server Board TPS

4.1.1System BIOS

The system BIOS is the core of the flash ROM-resident portion of the BIOS. The system BIOS provides standard PC-BIOS services and support for some new industry standards, such as the Advanced Configuration and Power Interface Specification, Revision 1.0 and Wired For Management Baseline Specification, Revision 2.0. In addition, the system BIOS supports certain features that are common across all the Intel servers. These include:

∙Security

∙MPS support

∙Server management and error handling

∙CMOS configuration RAM management

∙OEM customization

∙PCI and Plug and Play (PnP) BIOS interface

∙Console redirection

∙Resource allocation support

BIOS setup is embedded in flash ROM and provides the means to configure on-board hardware devices and add-in cards. For more information, refer to Section 4.2, Setup Utility.

4.1.2Flash Update Utility

The system BIOS and the setup utility are resident in partitioned flash ROM. The device is in- circuit reprogrammable. On the STL2 platform, 1 MB of flash ROM is provided. The STL2 BIOS does not support a SecureBIOS feature like some server products from Intel. This is because the addition of SecureBIOS increases boot time, and complexities, and does not provide compelling benefits for the STL2 platform.

The Phoenix Phlash Utility may be used to reprogram the BIOS operational code located in the flash ROM. A BIOS image is provided on a diskette in the form of a binary file that is read by the Phoenix Phlash Utility. Baseboard revisions may create hardware incompatibilities and may require different BIOS code.

4.1.2.1System Flash ROM Layout

The flash ROM contains system initialization routines, BIOS strings, BIOS Setup, and run-time support routines. The exact layout is subject to change, as determined by Intel. A 16 KB user block is available for user ROM code and another 128KB block is available for custom logos.

The flash ROM also contains compressed initialization code for on-board peripherals such as SCSI, NIC, and video controllers. The BIOS image contains all the BIOS components at appropriate locations. The Phoenix Phlash Utility can be used to reprogram the BIOS operational code areas.

At run time, none of the flash blocks is visible at the aliased addresses below 1 MB due to shadowing. Intel reserves the right to change the flash map without notice.

A 64 KB parameter block in the flash ROM is dedicated to storing configuration data that controls extended system configuration data (ESCD), on-board SCSI configuration, OEM configuration areas, etc. The block is partitioned into separate areas for logically different data.

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