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Intel STL2 manual 8.PCI Device Submenu Selections, 9.Option ROM Submenu Selections, 4-38

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Basic Input Output System (BIOS)

STL2 Server Board TPS

Table 4-8. PCI Device Submenu Selections

Feature	Choices or Display Only	Description	User Setting
PCI IRQ1 through	Disabled	Specify which PIC IRQ a certain PCI IRQ
PCI IRQ14	Auto Select	maps to.
	IRQ3
	IRQ4
	IRQ5
	IRQ6
	IRQ7
	IRQ9
	IRQ10
	IRQ11
	IRQ12

Table 4-9. Option ROM Submenu Selections

Feature	Choices or	Description	User Setting
	Display Only
Onboard SCSI	Enabled	Disables/Enables option ROM expansion for the on-board
	Disabled	SCSI option ROM. This must be enable if a boot device is
		connected to the on-board device.
Onboard LAN	Enabled	Disables/Enables option ROM expansion for the on-board LAN
	Disabled	option ROM.
PCI Slot 1	Enabled	Disables/Enables the expansion of the option ROM for devices
	Disabled	in PCI slot 1

PCI Slot 2	Enabled	Disables/Enables the expansion of the option ROM for devices
	Disabled	in PCI slot 2

PCI Slot 3	Enabled	Disables/Enables the expansion of the option ROM for devices
	Disabled	in PCI slot 3
PCI Slot 4	Enabled	Disables/Enables the expansion of the option ROM for devices
	Disabled	in PCI slot 4

PCI Slot 5	Enabled	Disables/Enables the expansion of the option ROM for devices
	Disabled	in PCI slot 5

PCI Slot 6	Enabled	Disables/Enables the expansion of the option ROM for devices
	Disabled	in PCI slot 6
PCI Slot 7	Enabled	Disables/Enables the expansion of the option ROM for devices
	Disabled	in PCI slot 7

Table 4-10. Numlock Submenu Selections

Feature	Choices or	Description	User
	Display Only		Setting
Numlock	Auto	Selects the power-on state for Numlock.
	On
	Off

Key Click	Disabled	Disables or enables keyclick.
	Enabled

4-38

Image 46

Intel STL2 manual 8.PCI Device Submenu Selections, 9.Option ROM Submenu Selections, 10.Numlock Submenu Selections, 4-38

Contents

Technical Product Specification Revision September 22, Enterprise Platforms GroupSTL2 Server Board Revision History Revision HistoryDisclaimers STL2 Server Board TPS2. STL2 Server Board Architecture Overview Table of ContentsIntroduction Server Management4-29 4. Basic Input Output System BIOS5. Jumpers and Connectors 5-616-81 Power ConsumptionMechanical Specifications 7-83List of Figures List of Tables Table 4-26.POST Error Messages and Codes 1.1Purpose 1.3STL2 Server Board Feature Overview1.Introduction 1.2Audience1.4STL2 Server Board Block Diagram ServerSet 3.0 LE STL2 Features STL2 Server Board Block DiagramFigure 1-1.STL2 Server Board Block Diagram BIOSIntroduction < This page intentionally left blank >STL2 Server Board TPS 2.1 Intel Pentium III Processor Subsystem 2.STL2 Server Board Architecture Overview2.1.1Supported Processor Types 2.1.5Termination Package 2.1.2Dual Processor Operation2.1.3PGA370 Socket 2.1.6APIC Bus∙NB6635 North Bridge 3.0LE 2.2ServerWorks ServerSet III LE Chipset2.3Memory ∙IB6566 South Bridge2.4.164-bit /66 MHz PCI Subsystem 2.4PCI I/O Subsystem2.4.1.1Ultra160 / Ultra WideSCSI Controller 2.4.1.1.1AIC-7899Supported PCI Commands Revision2.4.1.1.2SCSI Bus 2.4.232-bit/33MHz PCI Subsystem2.4.2.1Network Interface Controller NIC 2.4.2.1.1Supported Network Features 2.4.2.2.1Video Controller PCI Signals 2.4.2.2Video ControllerTable 2-4.Video Controller Supported PCI Commands 2.4.2.2.2Video Controller PCI Commands2.4.2.2.3Video Modes Table 2-5.Standard VGA Modes2.4.2.3.1PCI Interface 2.4.2.3IB6566 South Bridge2.4.2.3.2PCI Bus Master IDE Interface 2.5.1Legacy I/O Super I/O National* PC97317VUL 2.4.2.6Power Management2.5Chipset Support Components 2.4.2.3.3USB Interface2.5.1.1Serial Ports 2.5.1.4Keyboard and Mouse Connectors2.5.1.7Power Management Controller 2.5.1.2Parallel Port2.6.1Default I/O APIC 2.5.2BIOS Flash2.5.3External Device Connectors 2.6Interrupt RoutingInterrupt 2-18South RouterRevision 2-192.6.4Relationship between PCI IRQ and PCI Device 2.6.3PCI IdsTable 2-6.STL2 PCI IDs STL2 Server Board TPS Revision2-21 STL2 Server Board Architecture OverviewPage 3.Server Management 3.1Baseboard Management Controller∙Controls Wake-on-Lanvia Magic Packet* support 3.2Hardware Sensors∙Monitors the event receiver 3-24Revision 3-253-26 Platform Security3.3ACPI 3.4AC Link Mode 3.5Wake On LAN Function4.Basic Input Output System BIOS 4.1BIOS Overview4.1.2Flash Update Utility 4.1.1System BIOS4.1.2.1System Flash ROM Layout 4.2.1Configuration Utilities Overview 4.2Setup Utility4.2.2Setup Utility Operation Enter Execute Command 4.2.2.1Entering Setup Utility4.2.2.2Keyboard Command Bar F1 HelpF5/– Change Value F9 Setup Defaults←→ Select Menu F6/+ Change ValueThese and associated submenus are described below 4.2.2.4Main Menu Selections∙System Menu ∙Boot Menu ∙Exit Menu Table 4-2.Main Menu SelectionsRevision Table 4-4.Processor Settings Submenu Selections4-35 Table 4-5.Advanced Menu Selections 4.2.2.5Advanced Menu Selections4-36 Revision 4-37Table 4-10.Numlock Submenu Selections Table 4-8.PCI Device Submenu SelectionsTable 4-9.Option ROM Submenu Selections 4-38Revision 4.2.2.6Security Menu SelectionsTable 4-11.Security Menu Selections 4-39Table 4-13.Server Menu Selections 4.2.2.7System Hardware Menu SelectionsTable 4-12.Secure Mode Submenu Selections Table 4-14.Wake On Events Submenu SelectionsTable 4-17.Boot Device Priority Selections 4.2.2.8Boot Menu SelectionsTable 4-16.Boot Menu Selections Table 4-15.Console Redirection Submenu Selections4.3CMOS Memory Definition 4.2.2.9Exit Menu Selections4.5Flash Update Utility 4.4CMOS Default Override4.5.1Loading the System BIOS 4.5.2.1User-suppliedBIOS Code Support 4.5.2OEM Customization# of bit available –1 Revision4-45 Bit offset from start of CMOS of first bitSTL2 Server Board TPS 4.5.2.2Scan Point DefinitionsBasic Input Output System BIOS Scan Point4.5.3Language Area 4.5.4Recovery Mode4.5.2.3OEM Splash Screen 4.6Error Messages and Error Codes 4.6.1POST CodesExample Table 4-24.Standard BIOS Port-80Codes∙Each group is made one-based1 through Checkpoint 04Bh will be broken down toConfigure advanced chipset registers 4-50Revision 4-51Table 4-26.POST Error Messages and Codes 4.6.2POST Error Codes and MessagesTable 4-25.Recovery BIOS Port-80Codes 4-52Revision 4-53Error Basic Input Output System BIOSError Message 4-544.7.1BIOS Revision Level Identification 4.7Identifying BIOS and BMC Revision Levels4.7.2BMC Revision Level Identification 4.8Adaptec SCSI Utility 4.8.2Adaptec SCSI Utility Configuration Settings4.8.1Running the SCSI Utility User Setting Basic Input Output System BIOSRecommended Setting or Revision4.8.3Exiting Adaptec SCSI Utility 4-58Revision < This page intentionally left blank >4-59 Page Revision 5.Jumpers and ConnectorsJumper and connector location key for Figure 5-61Figure 5-2.I/O Back Panel Connectors I/O Back Panel location key for Figure5-62 5.1Jumper Blocks 5.1.1.1Clearing and Changing a Password 5.1.1.2Clearing CMOSRevision 5.1.1.3Perfoming a BIOS Recovery Boot5-65 5.1.2Setting Configuration Jumper Block 1L4 5.2Connectors 5.1.3Setting Configuration Jumper Block 6A5.2.3I2C Power Connector P37 5.2.1Main ATX Power Connector P335.2.2Auxilary ATX Power Connector P34 Table 5-6.Main ATX Power Connector Pinout5.2.6Speaker Connector P31 5.2.4System Fan Connectors P29, P27, P115.2.5Processor Connectors P12, P36 5.2.7Speaker Connector P25Figure 5-3.Diskette Drive Connector Pin Diagram 5.2.8Diskette Drive Connector P205.2.9SVGA Video Port Table 5-13.Diskette Drive Connector Pinout5.2.12Serial Ports COM1 and COM2 5.2.10Keyboard and Mouse Connectors5.2.11Parallel Port Table 5-15.Keyboard and Mouse Connector PinoutsTable 5-18. RJ-45LAN Connector Signals 5.2.13RJ-45LAN Connector5.2.14USB Connectors Table 5-19.USB ConnectorsTable 5-20.Ultra SCSI Connector Pinout 5.2.15Ultra SCSI Connector P95.2.16Ultra160 SCSI Connector P8 Table 5-21.Ultra160 SCSI ConnectorTable 5-22.IDE Connector Pinout 5.2.17IDE Connector P19Figure 5-4.IDE Connector Pin Diagram 5-74Revision 5.2.1832-BitPCI ConnectorTable 5-23. 32-BitPCI Connector Pinout 5-75Table 5-24. 64-BitPCI Connctor Pinout 5.2.1964-BitPCI Connector5-76 Revision 5.2.20Front Panel 24-pinConnector Pinout P23Table 5-25.Front Panel 24-pinConnector Pinout 5-775-78 ReservedRevision < This page intentionally left blank >5-79 Page 6.Power Consumption 6.1Calculated Power ConsumptionSTL2 Server Board TPS 6.2Measured Power ConsumptionPower Consumption DevicesRevision 7.Mechanical Specifications7-83 7-84 Mechanical Specifications< This page intentionally left blank > STL2 Server Board TPS8.Regulatory and Integration Information 8.1Regulatory Compliance8.2Installation Instructions 8.2.1Ensure EMC8.2.2.1In Europe 8.2.3Prevent Power Supply Overload8.2.4Place Battery Marking on Computer 8.2.2.2In the United States8.2.5Use Only for Intended Applications 8.2.6Installation Precautions8.3Environmental Limits 8.3.1System Office Environment∙Humidity Non-Operating 8.3.2System Environmental Testing∙Temperature Operating and Non-Operating ∙Shock Packaged and UnpackagedRegulatory and Integration Information < This page intentionally left blank >8-90 STL2 Server Board TPSGlossary RevisionReference Documents Index RevisionSee POST, 3-22, 3-24, 3-25, 4-29,4- 30, 4-33, Revision