Tx-Transmitted packets ExDefer | Intel ZT 8101 10/100 instruction

Using the Web Console

	Field	Description

	Tx—Transmitted packets

	ExDefer	Delayed. The number of frames for which the first transmission attempt on a
	ExDefer	particular interface was delayed because the medium was busy.


		Alignment. For 10 Mbps ports, the counter records CRC errors (FCS or
	CRC Error	alignment errors). For 100 Mbps ports, the counter records the sum of CRC
		errors and code errors (frames received with rxerror signal).

	Late Coll.	Late Collisions. The number of times that a collision is detected after the
	Late Coll.	allowable detection period.
		allowable detection period.

	Ex. Coll.	Excessive Collisions. The number of frames for which transmission failed
	Ex. Coll.	due to excessive collisions.
		due to excessive collisions.

	Single Coll.	Single Collision Frames. The number of successfully transmitted frames for
	Single Coll.	which transmission is inhibited by more than one collision.
		which transmission is inhibited by more than one collision.

	Coll.	Total Collisions. An estimate of the total number of collisions on this network
	Coll.	segment.
		segment.

To view an analysis of packet sizes and types

1.In the left panel, click Network Monitoring.

2.In the top panel under Statistics, click Port Packet Analysis.

3.In the Port field, select the port to view.

4.In the Interval field, select the interval for updating the statistics.

5.To clear the statistics and gather new, click Clear.

The tables contain the following information.

	Field	Description

	Frame Size	The size in octets (bytes) of frames transmitted
	Frame Size	through the switch.
		through the switch.

	Frame Type	The type of frame being transmitted

	Frame Counts	The total number of frames transmitted through the
	Frame Counts	switch of the corresponding size indicated.
		switch of the corresponding size indicated.

		The number of frames per second transmitted
	Frames/sec	through the switch of the corresponding size
		indicated.

	Packet Type	Either received (Rx) or transmitted (Tx) packets.

	Total	The total number of bytes or frames transmitted or
	Total	received.
		received.

	Total/sec	The total number of bytes or frames received or
	Total/sec	transmitted per sec.
		transmitted per sec.

106	Intel® NetStructure™ ZT 8101 10/100 Ethernet Switch User’s Manual

ZT 8101 10/100 specifications

The Intel ZT 8101 10/100 is a highly regarded network interface controller designed for efficient data communication in both home and enterprise environments. This versatile chip offers robust support for various networking technologies, making it suitable for a wide range of applications.

One of the most significant features of the Intel ZT 8101 is its capability to operate at both 10 Mbps and 100 Mbps, allowing for seamless integration into existing networks. This dual-speed functionality ensures that users can enjoy the benefits of faster data transfer rates while still maintaining compatibility with legacy hardware. The device automatically detects the network speed, facilitating a plug-and-play experience that minimizes user intervention.

The Intel ZT 8101 utilizes advanced features such as full-duplex support, which enables simultaneous data transmission and reception. This capability significantly enhances network efficiency and maximizes throughput, making it ideal for environments with high data traffic. Moreover, the chip employs sophisticated packet processing algorithms to prioritize data, reducing latency and ensuring smoother communication.

In terms of power efficiency, the Intel ZT 8101 is designed to consume minimal power, making it a suitable choice for energy-conscious applications. Its low power consumption allows for more efficient operations, contributing to overall system stability and longevity. Additionally, it incorporates power management features that can dynamically adjust the power usage based on network demand.

Another notable characteristic is the integration of hardware-based flow control, which helps prevent data packet loss during high-utilization periods. This capability is essential for maintaining the integrity of data transmission in busy network environments. The chip’s robust error detection and correction mechanisms further enhance data reliability, minimizing the chances of transmission errors.

The Intel ZT 8101 supports various network standards, including IEEE 802.3 and IEEE 802.3u, ensuring compatibility with a wide range of Ethernet devices. Its flexibility makes it an excellent choice for network upgrades, expansions, or new installations, allowing users to tailor their network infrastructure according to specific needs.

In summary, the Intel ZT 8101 10/100 network interface controller stands out for its dual-speed support, energy efficiency, and advanced networking features. Whether for home users looking to improve their network performance or businesses seeking reliable data communication solutions, the ZT 8101 represents a compelling choice that combines technology, reliability, and efficiency. As network demands continue to evolve, this Intel chip remains a fundamental component in many networking scenarios.

Intel ZT 8101 10/100 user manual Tx-Transmitted packets ExDefer

Models: ZT 8101 10/100

Using the Web Console

Field