μPD75P308
SUBSYSTEM CLOCK OSCILLATOR CIRCUIT CHARACTERISTICS (Ta =
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| Recommended | Item | Conditions | MIN. | TYP. | MAX. | Unit | ||||||||||||
| Oscillator |
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| Constants |
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| Crystal |
| XT1 |
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| XT2 |
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| Oscillation |
| 32 | 32.768 | 35 | kHz | ||||||
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| frequency (fXT) |
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| C3 |
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| C4 | Oscillation stabilization |
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| 1.0 | 2 | s | |||
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| time* |
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| VDD |
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| External Clock |
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| XT1 input frequency |
| 32 |
| 100 | kHz | |||||
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| XT1 |
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| XT2 |
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| (fXT) |
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| Open |
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| XT1 input |
| 5 |
| 15 | μs | |||||
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widths (tXTH, tXTL)
*: Time required for oscillation to stabilize after VDD reaches the minimum value of the oscillation voltage
range.
Caution: When using the oscillation circuit of the subsystem clock, wire the portion enclosed in dotted line ★ in the figures as follows to avoid adverse influences on the wiring capacity:
•Keep the wiring length as short as possible.
•Do not cross the wiring over the other signal lines. Do not route the wiring in the vicinity of lines through which a high alternating current flows.
•Always keep the ground point of the capacitor of the oscillator circuit at the same potential as VDD. Do not connect the power source pattern through which a high current flows.
•Do not extract signals from the oscillation circuit.
The amplification factor of the subsystem clock oscillation circuit is designed to be low to reduce the current dissipation and therefore, the subsystem clock oscillation circuit is influenced by noise more easily than the main system clock oscillation circuit. When using the subsystem clock, therefore, exercise utmost care in wiring the circuit.
CAPACITANCE (Ta = 25°C, VDD = 0 V)
Parameter | Symbol | Conditions | MIN. | TYP. | MAX. | Unit |
Input Capacitance | CIN | f = 1 MHz |
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| 15 | pF |
Output Capacitance | COUT | Pins other than thosemeasured are at 0 V |
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| 15 | pF |
Input/Output | CIO |
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| 15 | pF |
Capacitance |
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